21. The CPU sends out a ____ signal to indicate that valid data is available on the data bus.
read
write
both a and b
none of these
Answer: 2. write
Explanation:
The CPU sends out a write signal to indicate that valid data is available on the data bus.
22. The CPU removes the ___ signal to complete the memory write operation.
read
write
both a and b
none of these
Answer: 1. Read
Explanation:
The CPU removes the read signal to complete the memory write operation.
23. BIU STANDS FOR:
bus interface unit
bess interface unit
a and b
none of these
Answer: 1. bus interface unit
Explanation:
The Bus Interface Unit (BIU): It provides the interface of 8086 to external memory and I/O devices via the System Bus. It performs various machine cycles such as memory read, I/O read, etc. to transfer data between memory and I/O devices. It generates the 20-bit physical address for memory access.
24. EU STANDS FOR:
execution unit
execute unit
exchange unit
none of these
Answer: 1. execution unit
Explanation:
In computer engineering, an execution unit (E-unit or EU) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program.
25. Eight of the register are known as:
general-purpose register
pointer or index registers
segment registers
other registers
Answer:1. general-purpose register
Explanation:
Eight of the register are known as general-purpose registers. General-purpose registers are additional registers that are present in the CPU and are used for either memory address or data whenever needed. For example, storing current register content when there is an interruption.
26. IP Stand for:
instruction pointer
instruction purpose
instruction paints
none of these
Answer: 1. instruction pointer
Explanation:
The program counter (PC), commonly called the instruction pointer (IP) is incremented after fetching an instruction and holds the memory address of (“points to”) the next instruction that would be executed. (In a processor where the incrementation precedes the fetch, the instruction pointer points to the current instruction being executed.)
27. CS Stand for:
code segment
coot segment
cost segment
counter segment
Answer: 1. code segment
Explanation:
Code segment (CS) is a 16-bit register containing the address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by the instruction pointer (IP) register. CS register cannot be changed directly.
28. DS Stands for:
data segment
direct segment
declare segment
divide segment
Answer: 1. data segment
Explanation:
Data segment register (DS): points to the data segment of the memory where the data is stored. Extra Segment Register (ES): also refers to a segment in the memory which is another data segment in the memory. Stack Segment Register (SS): is used for addressing the stack segment of the memory.
29. The accumulator is 16 bit wide and is called:
ax
ah
al
dl
Answer: 1. ax
Explanation:
The accumulator is 16-bit wide and is called ax. In the 8085 Instruction set, STA is a mnemonic that stands for STore Accumulator contents in memory. In this instruction, Accumulator 8-bit content will be stored in a memory location whose 16-bit address is indicated in the instruction as a16. This instruction uses absolute addressing for specifying the destination.
30. How many bits the instruction pointer is wide:
16 bit
32 bit
64 bit
128 bit
Answer: 1. 16 bit
Explanation:
The instruction pointer is 16 bits register. . If every instruction had a size of 3 bytes (operands included), the instruction pointer would be incremented by 3 after each instruction is executed. All these are 16 bits long. The flags register is a collection of single-bit flags.
