Automatic Test Pattern Generation in VLSI MCQ Quiz – Objective Question with Answer for Automatic Test Pattern Generation in VLSI

11. Which method is more complex?

A. stuck at fault
B. CA
C. combinational ATPG
D. sequential ATPG

Answer: D

The sequential automatic test pattern generation method is more complex and remains a complex task for large highly sequential circuits.

 

12. Which are processing faults?
A. missing contact window
B. parasitic transistor
C. oxide breakdown
D. all of the mentioned

Answer: D

Some of the real defects in chips such as processing faults are missing contact windows, parasitic transistor,s and oxide breakdown.

 

13. Surface impurities occur due to ion migration.

A. true
B. false

Answer: A

Some of the material defects are bulk defects and surface impurities. Bulk defects are cracks and crystal imperfection and surface impurities occur due to ion migration.

 

14. Electromigration is a

A. processing fault
B. material defects
C. time-dependent failure
D. packaging fault

Answer: C

Different types of real defects in chips are processing faults, material defects, time-dependent failures, and packaging faults. Time-dependent failures are dielectric breakdown and electromigration.

 

15. Which relation is correct?

A. failure – error – fault
B. fault – error – failure
C. error – fault – failure
D. error – failure – fault

Answer: B

The relation fault – error – failure is correct. Error is caused by faults and failure which is a deviation of the circuit caused by error.

 

16. For a circuit with k lines __________ single stuck-at fault is possible.

A. k
B. 2k
C. k/2
D. k2

Answer: B

For a circuit with k lines, 2k single stuck-at faults are possible and 3k – 1 multiple stuck-at faults are possible.

 

17. Single stuck-at fault is technology independent.

A. true
B. false

Answer: A

The single stuck-at fault is technology independent. It can be applied to TTL, CMOS, etc. It is also design style independent.

 

18. For a n signal lines circuit _____________ bridging faults are possible.

A. n
B. 2n
C. n2
D. n/2

Answer: C

For circuits with n lines, n2 bridging faults are possible. The bridging fault occurs when two lines are connected when they should not be connected. It leads to wired AND or wired OR.

 

19. IDDQ fault occurs when there is

A. increased voltage
B. increased quiescent current
C. increased power supply
D. increased discharge

Answer: B

When the input is low, both P and N transistors are conducting causing an increase in quiescent current which leads to IDDQ fault.

 

20. Which fault causes output floating?

A. stuck-open
B. stuck-at
C. stuck-on
D. IDDQ

Answer: A

Transistor with stuck-open fault causes output floating. Stuck-open faults require two vector tests.

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