a) low cost
b) low weight and volume
d) all of the mentioned
Explanation: Electronics are characterized by reliability, low power dissipation, extremely low weight and volume, low cost, and can cope with a high degree of sophistication and complexity.
2. Speed power product is measured as the product of ____________
a) gate switching delay and gate power dissipation
b) gate switching delay and gate power absorption
c) gate switching delay and net gate power
d) gate power dissipation and absorption
Explanation: Speed power product is measured in picojoules and it is the product of gate switching delay and gate power dissipation.
3. nMOS devices are formed in ____________
a) p-type substrate of high doping level
b) n-type substrate of low doping level
c) p-type substrate of moderate doping level
d) n-type substrate of high doping level
Explanation: nMOS devices are formed in a p-type substrate of moderate doping level. nMOS devices have higher mobility and is cheaper.
4. Source and drain in nMOS device are isolated by ____________
a) a single diode
b) two diodes
c) three diodes
d) four diodes
Explanation: The source and drain regions are formed by diffusing n-type impurity, it gives rise to the depletion region which extends into the more lightly doped p-region. Thus Source and drain in an nMOS device are isolated by two diodes.
5. In depletion mode, source and drain are connected by ____________
a) insulating channel
b) conducting channel
Explanation: In depletion mode, the source and drain are connected by conducting channel but the channel can be closed by applying a suitable negative voltage to the gate.
6. What is the condition for the non-saturated region?
a) Vds = Vgs – Vt
b) Vgs lesser than Vt
c) Vds lesser than Vgs – Vt
d) Vds greater than Vgs – Vt
Explanation: The condition for the nonsaturated region is Vds lesser Vgs – Vt. In the non-saturation region, MOSFET acts as the voltage source. Varying Vds will provide a significant change in drain current.
7. In enhancement mode, device is in _________ condition.
c) partially conducting
Explanation: In enhancement mode, the device is in non-conducting condition. For n-type FET, the threshold voltage is positive and p-type threshold voltage is negative.
8. What is the condition for non-conducting mode?
a) Vds lesser than Vgs
b) Vgs lesser than Vds
c) Vgs = Vds = 0
d) Vgs = Vds = Vs = 0
Explanation: In enhancement mode the device is in non-conducting mode, and its condition is Vds = Vgs = Vs = 0.
9. nMOS is ____________
a) donor doped
b) acceptor doped
c) all of the mentioned
d) none of the mentioned
Explanation: nMOS transistors are acceptor doped. Acceptor is a dopant that when added forms a p-type region. Some of the acceptors are silicon, boron, aluminum etc.
10. MOS transistor structure is ____________
b) non symmetrical
c) semi symmetrical
d) pseudo symmetrical
Explanation: MOS transistor structure is completely symmetrical with respect to source and drain.