1. MOS technology has more load driving capability.
A. true
B. false
Answer: B
One of the disadvantages of MOS technology is it has limited load driving capabilities.
2. What is the disadvantage of the MOS device?
A. limited current sourcing
B. limited voltage sinking
C. limited voltage sourcing
D. unlimited current sinking
Answer: A
MOS devices have limited current sourcing and current sinking abilities.
3. What are the advantages of BiCMOS?
A. higher gain
B. high-frequency characteristics
C. better noise characteristics
D. all of the mentioned
Answer: D
BiCMOS provides higher gain, better noise, and high-frequency characteristics than MOS transistors.
4. What are the features of BiCMOS?
A. low input impedance
B. high packing density
C. high input impedance
D. bidirectional
Answer: A
Some of the features of BiCMOS are low input impedance, low packing density, unidirectional, high output drive current, etc.
5. BiCMOS has low power dissipation.
A. true
B. false
Answer: B
BiCMOS has high power dissipation and CMOS has low power dissipation.
6. CMOS is __________
A. unidirectional
B. bidirectional
C. directional
D. none of the mentioned
Answer: A
BiCMOS is unidirectional and CMOS is bidirectional.
7. In bipolar transistor, its quality can be improved by __________
A. increasing collector resistance
B. decreasing collector resistance
C. collector resistance does not affect the quality
D. decreasing gate resistance
Answer: B
The quality of the bipolar transistor can be improved by reducing the collector resistance, which can be done by using the additional layer of n+ subcollector.
8. BiCMOS can be used in __________
A. amplifying circuit
B. driver circuits
C. divider circuit
D. multiplier circuit
Answer: B
BiCMOS is more advantageous and improved than CMOS and it can be used in I/O and driver circuits.
9. What are the advantages of E-beam masks?
A. small feature size
B. larger feature size
C. looser layer
D. complex design
Answer: A
The advantages of E-beam masks are it has a tighter layer to layer registration and it has smaller feature sizes.
10. Which process is used in E-beam machines?
A. raster scanning
B. vector scanning
C. raster & vector scanning
D. none of the mentioned
Answer: C
The two approaches to the design of E-beam machines are raster scanning and vector scanning.
11. What is the feature of vector scanning?
A. faster
B. slow
C. easy handling
D. very simple design
Answer: A
Vector scanning is faster but the data handling involved is more complex. Vector scanning is done between the endpoints.
12. Which has high input resistance?
A. nMOS
B. CMOS
C. pMOS
D. BiCMOS
Answer: B
CMOS technology has high input resistance and is best for constructing simple low-power logic gates.
13. BiCMOS has a lower standby leakage current.
A. true
B. false
Answer: B
BiCMOS has the potential for high standby leakage current and has high power consumption compared to CMOS.
14. CMOS technology is used in developing which of the following?
A. microprocessors
B. microcontrollers
C. digital logic circuits
D. all of the mentioned
Answer: D
CMOS technology is used in developing microcontrollers, microprocessors, digital logic circuits and other integrated circuits.
15. CMOS technology is used in developing which of the following?
A. microprocessors
B. microcontrollers
C. digital logic circuits
D. all of the mentioned
Answer: D
CMOS technology is used in developing microcontrollers, microprocessors, digital logic circuits and other integrated circuits.
16. CMOS has __________
A. high noise margin
B. high packing density
C. high power dissipation
D. high complexity
Answer: B
Some of the properties of CMOS are that it has low power dissipation, high packing density and low noise margin.
17. In CMOS fabrication, nMOS and pMOS are integrated in same substrate.
A. true
B. false
Answer: A
In CMOS fabrication, nMOS and pMOS are integrated in the same chip substrate. n-type and p-type devices are formed in the same structure.
18. P-well is created on __________
A. p substrate
B. n substrate
C. p & n substrate
D. none of the mentioned
Answer: B
P-well is created on n substrate to accommodate n-type devices whereas p-type devices are formed in the ntype substrate.
19. Oxidation process is carried out using __________
A. hydrogen
B. low purity oxygen
C. sulphur
D. nitrogen
Answer: A
The oxidation process is carried out using high purity oxygen and hydrogen. Oxidation is the process of oxidizing or being oxidised.
20. Photoresist layer is formed using __________
A. high sensitive polymer
B. light-sensitive polymer
C. polysilicon
D. silicon dioxide
Answer: B
Light sensitive polymer is used to form the photoresist layer. The photoresist is a light-sensitive material used to form a patterned coating on a surface.
21. In CMOS fabrication, the photoresist layer is exposed to __________
A. visible light
B. ultraviolet light
C. infrared light
D. fluorescent
Answer: B
The photoresist layer is exposed to ultraviolet light to mark the regions where diffusion is to take place.
22. Few parts of photoresist layer is removed by using __________
A. acidic solution
B. neutral solution
C. pure water
D. diluted water
Answer: A
Few parts of the photoresist layer is removed by treating the wafer with a basic or acidic solution. Acidic solutions are those which have a pH less than 7 and basic solutions have greater than 7.
23. P-well doping concentration and depth will affect the __________
A. threshold voltage
B. Vss
C. Vdd
D. Vgs
Answer: A
Diffusion should be carried out very carefully, as doping concentration and depth will affect both threshold voltage and breakdown voltage.
24. Which type of CMOS circuits are good and better?
A. p well
B. n well
C. all of the mentioned
D. none of the mentioned
Answer: B
N-well CMOS circuits are better than p-well CMOS circuits because of the lower substrate bias effect.
25. N-well is formed by __________
A. decomposition
B. diffusion
C. dispersion
D. filtering
Answer: B
N-well is formed by using ion implantation or diffusion. Ion implantation is a process by which ions of a material are accelerated in an electrical field and impacted into a solid. Diffusion is a process in which the net movement of ions or molecules plays a major role.
26. _______ is sputtered on the whole wafer.
A. silicon
B. calcium
C. potassium
D. aluminum
Answer: D
Aluminum is sputtered on the whole wafer before removing the excess metal from the wafer.
27. nMOS fabrication process is carried out in ____________
A. thin wafer of a single crystal
B. thin wafer of multiple crystals
C. thick wafer of a single crystal
D. thick wafer of multiple crystals
Answer: A
The nMOS fabrication process is carried out in a thin wafer of a single crystal with high purity.
28. ______________ impurities are added to the wafer of the crystal.
A. n impurities
B. p impurities
C. silicon
D. crystal
Answer: B
p impurities are introduced as the crystal is grown. This increases the hole concentration in the device.
29. What kind of substrate is provided above the barrier to dopants?
A. insulating
B. conducting
C. silicon
D. semiconducting
Answer: A
Above a layer of silicon dioxide which acts as a barrier, an insulating layer is provided upon which other layers may be deposited and patterned.
30. The photoresist layer is exposed to ____________
A. Visible light
B. Ultraviolet light
C. Infra red light
D. LED
Answer: B
The photoresist layer is exposed to ultraviolet light to mark the regions where diffusion is to take place.