21. Which writing mechanism forms the backbone of the bus snooping mechanism?
A. write-back
B. write-through
C. no caching of write cycles
D. write buffer
Answer: C
The no caching of the write cycle seems to be wasteful because it does not update the cache, and if any previous data is cached, that entry might be an error and is not used. So the processor access data from the main memory but this writing scheme forms the backbone of the bus snooping system for the coherency issue.
22. What is the main idea of the writing scheme in the cache memory?
A. debugging
B. accessing data
C. bus snooping
D. write-allocate
Answer: C
There is four main writing scheme in the cache memory which is, write-through, write-back, no caching of the write cycle, and write buffer. All these writing schemes are designed for bus snooping which can reduce the coherency.
23. In which scheme does the data write via a buffer to the main memory?
A. write buffer
B. write-back
C. write-through
D. no caching of the write cycle
Answer: A
The write buffer is slightly similar to the write-through mechanism in which data is written to the main memory but in the write buffer mechanism, data writes to the main memory via a buffer.
24. Which of the following can allocate entries in the cache for any data that is written out?
A. write-allocate cache
B. read-allocate cache
C. memory-allocate cache
D. write cache
Answer: A
A write-allocate cache allocates the entries in the cache for any data that is written out. If the data is transferred to the external memory so that, when it is accessed again, the data is already waiting in the cache. It works efficiently if the size of the cache is large and it does not overwrite even though it is advantageous.
25. Which of the following uses a bus snooping mechanism?
A. MC88100
B. 8086
C. 8051
D. 80286
Answer: A
The bus snooping mechanism uses a combination of cache tag status, write policies, and bus monitoring to ensure coherency. MC88100 or MC88200 uses a bus snooping mechanism.
26. What leads to the development of MESI and MEI protocol?
A. cache size
B. cache coherency
C. bus snooping
D. number of caches
Answer: B
The problem of cache coherency lead to the formation of two standard mechanisms called MESI and MEI protocol. MC88100 has a MESI protocol and MC68040 uses an MEI protocol.
27. Which of the following is also known as Illinois protocol?
A. MESI protocol
B. MEI protocol
C. Bus snooping
D. Modified exclusive invalid
Answer: A
The MESI protocol is also known as the Illinois protocol because of its formation at the University of Illinois.
28. What does MESI stand for?
A. modified exclusive stale invalid
B. modified exclusively shared invalid
C. modified exclusive system input
D. modifies embedded shared invalid
Answer: B
The MESI protocol supports a shared state which is a formal mechanism for controlling the cache coherency by using the bus snooping techniques. MESI refers to the states that cached data can access. In the MESI protocol, multiple processors can cache shared data.
29. What does MEI stand for?
A. modified embedded invalid
B. modified embedded input
C. modified exclusive invalid
D. modified exclusive input
Answer: C
MEI protocol is less complex and easy to implement. It does not allow a shared state for the cache.
30. Which protocol does MPC601 use?
A. MESI protocol
B. MEI protocol
C. MOSI protocol
D. MESIF protocol
Answer: A
MPC601 uses a MESI protocol, that is they have a shared state for data accessing in the cache. It can reduce the cache coherency but the cache coherency is processor-specific. So different processors have different cache coherency implementations.
