# Capacitive Loads and Wiring Capacitance MCQ Quiz – Objective Question with Answer for Capacitive Loads and Wiring Capacitance

1. The capacitances in MOSFET occurs due to _____________

A. Interconnects
B. Difference in Doping concentration
C. Difference in dopant materials
D. All of the mentioned

The on-chip capacitances found in MOS circuits are due to interconnects, differences in Doping concentration, and differences in dopant materials.

2. The parasitic capacitances found in MOSFET are ___________

A. Oxide related capacitances
B. Inter electrode capacitance
C. Electrolytic capacitance
D. All of the mentioned

The parasitic device capacitances can be classified into two major groups: oxide-related capacitances and junction capacitances.

4. The capacitance that exists between Gate and Bulk is called ___________

A. Oxide parasitic capacitance
B. Metal oxide capacitance
C. MOS capacitance
D. None of the mentioned

The capacitance that exists between Gate and Bulk is called as an oxide parasitic capacitance.

5. In Cut-off Mode, the capacitance Cgs will be equal to ___________

A. 2Cgd
B. 0
C. Cgb
D. All of the mentioned

In cut-off mode, the conducting channel does not exist, so gate-to-source and the gate-to-drain capacitances are both equal to zero.

6. In cut-off mode, the value of gate to substrate capacitance is equal to ___________

A. Cox .(W- L)
B. Cox W/ L
C. Cox* W*L
D. 0

In Cut-off mode, the conducting channel does not exist, so gate-to-source and the gate-to-drain capacitances are both equal to zero. Therefore, the gate to substrate capacitance is equal to Cox* W*L.

7. In linear mode operation, the parasitic capacitances that exists are ___________

A. Nonzero Gate to source capacitance
B. Nonzero Gate to drain capacitance
C. Zero gate to substrate capacitance
D. All of the mentioned

In linear-mode operation, the conducting channel exists, therefore there will be a finite amount of gate to source and gate to drain capacitances. Since the conducting channel exists, the gate to substrate capacitance is reduced to zero.

8. In saturation mode operation, gate to drain capacitance is zero due to ___________

A. Gate and drain are interconnected
B. Channel length is reduced
C. Inversion layer doesn’t exist
D. Drain is connected to ground

Due to the pinched off-channel, the capacitance between source to drain is reduced to zero.

9. When MOSFET is operating in the saturation region, the gate to source capacitance is?

A. 1/2*Cox*W*L
B. 2/3*Cox*W*L
C. Cox*W*L
D. 1/3*Cox*W*L

Due to the reduction in channel length, the gate to drain, and gate to substrate capacitance are zero, the gate to channel capacitance as seen between the gate and the source is approximately defined as 2/3*Cox*W*L.

10. The load capacitance is measured between _____

A. Output node and input node
B. Output node and Vcc
C. Output node and ground
D. Input node and ground