D-A and A-D Converter MCQ

1. Express the output voltage of digital to analog converter?

A. V_o =KV_FS(d₁2^-1+d₂2^-2+….d_n2^-n)
B. V_o =V_FS/k(d₁2^-1+d₂2^-2+….d_n2^-n)
C. V_o =V_FS(d₁2^-1+d₂2^-2+….d_n2^-n)
D. V_o =K(d₁2^-1+d₂2^-2+….d_n2^-n)

Answer: A

The input is an n-bit binary word D and is combined with the reference voltage V_R to give an analog output signal. Mathematically it is described as

V_o =KV_FS(d₁2^-1+d₂2^-2+….d_n2^-n) where, K -scaling factor, V_FS-full scale output voltage.

2. Why the switches used in weighted resistor DAC are of single pole double throw (SPDT) type?

A. To connect the resistance to reference voltage
B. To connect the resistance to ground
C. To connect the resistance to either reference voltage or ground
D. To connect the resistance to the output

Answer: C

SPDT are electronic switches controlled by a binary word. If the binary input to a switch is 1, it connects the resistance to the reference voltage and if the input is 0, the switch connects the resistor to the ground.

3. Determine the output current for an n-bit weighted resistor DAC?

A. (V_R/R )× (d_o/2 +d₁/2² + ……d_n/2ⁿ)
B. (V_R/R )× (d₁/2¹ +d₂/2² + ……d_n/2ⁿ)
C. (V_R/R )× (d₀²/2 +d₁²/2² + ……d_n²/2ⁿ)
D. None of the mentioned

Answer: B

The output current for an n-bit weighted resistor DAC is

I_o= I₁+I₂+….I_n

I_o= (V_R/2R )×(d₁) +(V_R/2²R)× (d₂) ….+(V_R/2ⁿR )×(d_n)

I_o =(V_R/R)× (d₁/2¹ +d₂/2² + ……d_n/2ⁿ).

4. In a D-A converter with a binary-weighted resistor, the desired step size can be obtained by

A. Selecting proper value of V_FS
B. Selecting proper value of R
C. Selecting proper value of R_F
D. All of the mentioned

Answer: C

The size of the steps depends on the value of R_F, provided that the maximum output voltage does not exceed the saturation level of an op-amp.

5. Determine the Full-scale output in an 8-bit DAC for the 0-15v range?

A. Full-scale output=15.1v
B. Full scale output=15.2v
C. Full scale output=14.5v
D. Full scale output=14.94v

Answer: D

Full scale output = (Full scale voltage -LSB)

= [15v-(15v/2⁸)]

= (15v-0.0586) = 14.94v.

6. Pick out the incorrect statement “In a 3-bit weighted resistor DAC”

A. Although the op-amp is connected in inverting mode, it can also be connected in non-inverting mode
B. The op-amp simply works as a current to voltage converter
C. The polarity of the reference voltage is chosen in accordance with the input voltage
D. None of the mentioned

Answer: C

The polarity of the reference voltage is in accordance with the type of switch used. For example, in TTL switches, the reference voltage should be +5v and the output will be negative.

7. What is the disadvantage of binary-weighted type DAC?

A. Require a wide range of resistors
B. High operating frequency
C. High power consumption
D. Slow switching

Answer: A

For a better resolution of output, the input binary word length has to be increased. As the number of bits increases, the range of resistance values increases.

8. The smallest resistor in a 12-bit weighted resistor DAC is 2.5kΩ, what will be the largest resistor value?

A. 40.96MΩ
B. 10.24MΩ
C. 61.44 MΩ
D. 18.43MΩ

Answer: B

The largest resistor value for 12-bit DAC= 2ⁿ×R = 2¹²×2.5kΩ = 4096×2.5kΩ =10.24MΩ.

9. CMOS inverter is used as SPDT switch in resistor DAC and is connected to the op-amp line. Find the output of CMOS, if the input applied is 1

A. Resistance is connected to ground
B. Resistance is connected to the input line
C. Resistance is connected to the bit line
D. None of the mentioned

Answer: B

When Qbar =1, it makes transistor Q₁-ON and Q₂-OFF. The output of the CMOS inverter is 0v, connecting the resistance R₁ to the ground.

10. How to overcome the limitation of binary-weighted resistor type DAC?

A. Using R-2R ladder type DAC
B. Multiplying DACs
C. Using monolithic DAC
D. Using hybrid DAC

Answer: A

Usage wide range of resistors is the limitation of binary-weighted resistor type DAC, this can be avoided by using R-2R ladder type DAC Where only two values of the resistor are required.

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D-A and A-D Converter MCQ

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