Design Using CAD Tools MCQ Quiz – Objective Question with Answer for Design Using CAD Tools in VLSI

1. Physical verification tools in the design process include

A. circuit extractors
B. textual entry
C. graphical entry
D. simulation

Answer: A

Physical verification tools in the design process include design rule checking, circuit extractors, ratio rule, and other static checks.


2. Behavioral tools contain

A. graphical entry
B. design check
C. performance check
D. simulation

Answer: D

Behavioral tools contain simulation at various levels. It will be required to check out the design before turning out the design into silicon.


3. Simulators are available for

A. transistor-level logic
B. switch level logic
C. gate-level logic
D. design level logic

Answer: B

Simulators are available for switch-level logic and timing simulation. This is used to check out the design.


4. Selection and placement is done using

A. cursor
B. shapes
C. textual
D. graphical

Answer: A

Selection and placement of geometric shapes are done using some form of the cursor and it may also allow the selection of menu items.


5. Cursor position is controlled using

A. mouse
B. bit pad digitizer
C. mouse and bit pad digitizer
D. keyboard

Answer: C

The positioning of the cursor may be affected by the keyboard and the cursor position is controlled by a bit pad digitizer or a mouse.


6. CIF code is a ______ layout language.

A. mask level
B. floor level
C. design level
D. transistor level

Answer: A

CIF is an example of mask-level layout language, which is well suited to physical layout description but not for capturing the design intent.


7. Which verification capture’s design intent and not the physical layout?

A. mask level layout language
B. transistor level layout language
C. circuit description language
D. switch level layout language

Answer: C

Circuit description language where the primitives are circuit elements such as transistors, wires, and nodes. It captures the design intent and not directly the physical layout.


8. All possible errors in mask layout can be eliminated after mask-making proceeds.

A. true
B. false

Answer: B

The cost in time and the facilities in mask-making is such that all the possible errors must be eliminated before mask-making proceeds.


9. The nature of physical layout verification software depends on

A. absolute design rules
B. fixed layout
C. virtual grid layout
D. all of the mentioned

Answer: D

The nature of physical layout verification design rule checking software depends on whether the design rules are absolute or lambda-based or on whether or not the layout is on a fixed or virtual grid.


10. Which is used to interpret physical layout in circuit terms?

A. circuit converter
B. layout converter
C. circuit extractor
D. layout extractor

Answer: C

A circuit extractor is used to convert the design information which is in the form of physical layout data to circuit terms.

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