Embedded System Cache Memory MCQ Quiz – Objective Question with Answer for Embedded System Cache Memory

In the physical cache, the data is preserved within the cache because it does not flush out during the context switching but on the other hand, the logical cache flushes out the data and clears it during a context switching.

The physical address access the data through the memory management unit which causes a delay.

The physical cache is more efficient and can provide the cache coherency problem solved and MMU delay is kept to a minimum. PowerPC is an example of this advantage.

The Intel 80486DX processor has a unified cache. Similarly, Motorola MPC601PC also uses the unified cache. The unified cache has the same mechanism to store both data and instructions.

The Harvard cache has a separate cache for the data and the instruction whereas the unified cache has the same cache for the data and instructions.

The SPARC architecture uses a logical cache whereas most of the internal caches designed now, use a physical cache because data is not flushed out in this cache.

The Harvard architecture has a separate bus for data and instruction, therefore, it requires more area. It also uses more silicon area for the second set of tags and the comparators.

Coherency is a major challenge in designing cache memory. The cache has to be designed by solving the problem of data coherency while remaining hardware and software compatible.

The stale data arises when the copy is held both in the cache memory and in the main memory. If either copy is modified, the other data become stale and the system coherency can be destroyed.