1. What are the factors of filters that are determined by the speed of the operation in a digital signal processor?
A. attenuation constant
B. frequency
C. bandwidth
D. phase
Answer: C
The bandwidth of any filter depends on the speed of operations held in a digital signal processor.
2. How many tables does an FIR function of a digital signal processor possess?
A. 1
B. 2
C. 3
D. 4
Answer: B
The Digital signal processor function involves the setting up of two tables one is for sampled data and the other table is for filter coefficients which determine the filter response. It takes values from the table and performs programs.
3. Why is said that branch prediction is not applicable in a digital signal processor?
A. low bandwidth
B. high bandwidth
C. low frequency
D. high frequency
Answer: A
Loop control timing varies depending on the branch predictions which in turn make bandwidth predictions difficult thereby lowering the bandwidth of the digital signal processor.
4. Which architecture can one overcome the low bandwidth issue in the MC6800 family?
A. RISC
B. CISC
C. von Neumann
D. program stored
Answer: A
RISC architecture can offer some improvement in the low bandwidth issue since it has the ability to perform operations in a single cycle.
5. Which architecture in the digital signal processor reduces the execution time?
A. Harvard
B. CISC
C. program storage
D. von Neumann
Answer: A
Harvard architecture in a digital signal processor allows continuous data fetching and performing the corresponding instructions.
6. Which of the following processors also can work as a digital signal processor?
A. 8086
B. 8088
C. 8080
D. ARM9E
Answer: D
ARM9E can also have a DSP level of performance without having a digital signal processor by its enhanced DSP instructions.
7. What types of modules are used in the digital signal processor to form the loop structure?
A. modulo-timer
B. modulo-counter
C. timer
D. external timer
Answer: B
By using hardware multipliers, counters, etc the entire hardware can be redesigned to perform some specific functions which are used in digital signal processors. One such is the modulo-counter to form the loop structure.
8. Name a processor which is used in digital audio appliances.
A. 8086
B. Motorola DSP56000
C. 80486
D. 8087
Answer: B
Motorola DSP56000 is a powerful digital signal processor which is used in digital audio applications which have the capability of noise reduction and multi-band graphics whereas 8087 is a coprocessor and 80486 and 8086 are microprocessors.
9. How many bits does the DSP56000 processor have?
A. 8
B. 16
C. 24
D. 32
Answer: C
In order to increase the resolution, DSP56000 is a 24-bit data word processor.
10. How many buses did DSP56000 possess?
A. 2
B. 3
C. 4
D. 5
Answer: B
It possesses three separate external buses, one is for the program and the remaining two buses are for X and Y memories for data.
11. Which of the following architecture does DSP56000 possess?
A. Harvard
B. von Neumann
C. CISC
D. program-stored
Answer: A
DSP56000 possesses Harvard architecture since this architecture has a separate bus for program memory and data memory.
12. What does AAU stand for?
A. arithmetic address unit
B. address arithmetic unit
C. address access unit
D. arithmetic access unit
Answer: B
DSP56000 possesses two external bus switches which one is for data and the other is for the address for communicating with the outside world and these two switches are reproduced by the internal data bus and AAU.
13. How many address registers does the AAU of a DSP56000 have?
A. 8
B. 16
C. 24
D. 32
Answer: C
AAU has 24 address registers in three banks of eight.
14. How many registers does a DSP56000 have?
A. 4
B. 5
C. 7
D. 6
Answer: C
DSP56000 has six 24-bit registers for controlling the loop counts, operating mode, stack manipulation, and condition codes.
15. Which of the following bits are used for sign extension in DSP56000?
A. upper 8 bits of the stack pointer
B. lower 8 bits of the stack pointer
C. lower 8 bits of the program counter
D. upper 8 bits of the program counter
Answer: D
The DSP56000 has a 24-bit program counter in which the upper 8 bits are only used for sign extension.
16. How many bit register sets does RISC 1 model use?
A. 138*24
B. 138*32
C. 69*16
D. 69*32
Answer: B
RISC 1 model is developed in the 1970s and uses a large register set of 138*32 bit. These are arranged in eight overlapping windows which have 24 registers each and these windows are split so that six registers can be used during function calls.
17. Which of the following processor commercializes the Berkeley RISC model?
A. SPARC
B. Stanford
C. RISC-1
D. RISC
Answer: A
The Berkeley RISC design was developed between the years 1980 and 1984 and later on, the RISC design was commercialized as a SPARC processor.
18. How many transistors does RISC 1 possess?
A. 44000
B. 45000
C. 44500
D. 45500
Answer: C
The final design of the RISC concept is called the RISC 1 which was published by ACM ISCA. It possesses 44500 transistors which can implement 31 instructions.
19. How many registers does the RISC 1 model have?
A. 68
B. 58
C. 78
D. 88
Answer: C
The RISC 1 model has 78 registers of size 32 bits.
20. Which of the architectures are made to speed up the processor?
A. CISC
B. RISC
C. program stored
D. von Neumann
Answer: B
RISC architecture is made for speeding up the processor with limited execution time whereas CISC architecture is mainly for code efficiency.
