Embedded System MCQ [Free PDF] – Objective Question Answer for Embedded System Quiz

71. Which of the architecture is more complex?

a) MC68040
b) MC68030
c) SPARC
d) 8086

Answer: c

SPARC has RISC architecture which has a simple instruction set but MC68020, MC68030, and 8086 have CISC architecture which is more complex than CISC.

 

72. Which of the following statements are true for von Neumann architecture?

a) separate bus between the program memory and data memory
b) external bus for program memory and data memory
c) external bus for data memory only
d) shared bus between the program memory and data memory

Answer: d

von Neumann architecture shares a bus between program memory and data memory whereas Harvard architecture has a separate bus for program memory and data memory.

 

73. What is the approximate data access time of SRAM?

a) 2ns
b) 10ns
c) 60ns
d) 4ns

Answer: d

SRAM access data in approximately 4ns because of its flip-flop arrangement of transistors whereas the data access time in DRAM is approximately 60ns since it has a single capacitor for one-bit storage.

 

74. Which of the following is a plastic package used primarily for DRAM?

a) Zig-zag
b) DIMM
c) SIMM
d) Dual-in-line

Answer: a

A zig-zag package of memory is a plastic package used for DRAM. The leads of this package are arranged in a zigzag manner.

 

75. Which of the following is the biggest challenge in the cache memory design?

a) coherency
b) memory access
c) size
d) delay

Answer: a

Coherency is a major challenge in designing cache memory. The cache has to be designed by solving the problem of data coherency while remaining hardware and software compatible.

 

76. Which ports are used in the multi-master system to avoid errors?

a) bidirectional port
b) tridirectional port
c) multi-directional port
d) unidirectional port

Answer: a

By using the bidirectional ports, each master can monitor the line and confirm its expected state and if it is not matched, a mismatch or collision had occurred which will discontinue the transmission by the master.

 

77. Which provides an input clock for the receiver part of the UART 8250?

a) DDIS
b) MR
c) RD
d) RCLK

Answer: d

RCLK provides an input clock for the receiver part of the UART. RD is the read signal. MR is the master reset pin and DDIS is used to control bus arbitration logic.

 

78. What does PCM stand for?

a) peculiar code modulation
b) pulse codec machine
c) pulse code modulation
d) peripheral code machine

Answer: c

The linear codec is also known as pulse code modulation which is commonly used in the telecommunications industry.

 

79. Which of the following is the common method for connecting the peripheral to the processor?

a) software
b) exception
c) external interrupts
d) internal interrupts

Answer: c

The common method for connecting the peripheral to the processor is the external interrupts. The external interrupts are provided through the external pins which are connected to the peripherals.

 

80. What allows the data protection in the software interrupt mechanism?

a) TRAP
b) SWI
c) Same mode
d) Different mode

Answer: d

The switching between user mode and supervisor mode provides protection for the processor, that is, the different modes in the software interrupt allows the memory and the associated code and data to be protected from each other.

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