A. Diode fabrication
B. BJT fabrication
C. FET fabrication
D. None of the mentioned
Answer: B
The basic processes used are as same as BJT fabrication. The epitaxial layer (collector of BJT) is used as the n-channel of JFET. The p+ is formed in the n-channel by the process of diffusion and the n+ region is formed underdrain and the source provides good ohmic contact.
2. What are the types of MOSFET devices available?
A. P-type enhancement type MOSFET
B. N-type enhancement type MOSFET
C. Depletion type MOSFET
D. All of the mentioned
Answer: D
MOSFETs are available as Enhancement types and depletion types MOSFET. These are further classified into n-type and p-type devices.
3. Which insulating layer is used in the Fabrication of MOSFET?
A. Aluminium oxide
B. Silicon Nitride
C. Silicon dioxide
D. None of the mentioned
Answer: C
Silicon dioxide is used as an insulating layer in MOSFET Fabrication. It gives an extremely high input resistance in the order of 1010 to 1015 Ω for MOSFET.
4. Which of the following plays an important role in improving the device performance of MOSFET?
A. Dielectric constant
B. Threshold voltage
C. Power supply voltage
D. Gate to drain voltage
Answer: B
In MOSFET, the threshold voltage is typically 3 to 6v. This large voltage is not compatible with 5v supply used in digital IC. So, to improve device performance, the magnitude of threshold voltage should be reduced.
5. A technique used to reduce the magnitude of the threshold voltage of MOSFET?
A. Use of complementary MOSFET
B. Use of Silicon nitride
C. Using thin-film technology
D. None of the mentioned
Answer: B
Silicon nitride is sandwiched between two SiO2 layers and provides the necessary barrier. The dielectric constant of Si3N4 is 7.5, whereas that of SiO2 is 4. This increase in the overall dielectric constant reduces threshold voltage.
6. Find the sequence of steps involved in the fabrication of polysilicon gate MOSFET?
Step 1: Entire wafer surface of a Si3N4is coated and it is etched away with the help of a mask to include the source, gate, and drain.
Step 2: The contact areas are defined using a photolithographic process
Step3: Selective etching of Si3N4 and thin oxide growth
Step 4: Deposition of polysilicon gate
Step 5: thick oxide growth called field oxide and P implantation
Step 6: Metallization and interconnection between substrate and source
A. 1->5->3->4->2->6
B. 1->3->4->2->5->6
C. 1->5->4->3->2->6
D. 1->4->2->5->3->6
Answer: A
The mentioned steps are the sequence of steps involved in the fabrication of polysilicon gate MOSFET.
Step 1: Entire wafer surface of a Si3N4is coated and it is etched away with the help of a mask to include the source, gate, and drain.
Step 2: thick oxide growth called field oxide and P implantation
Step3: Selective etching of Si3N4 and thin oxide growth
Step 4: Deposition of polysilicon gate
Step 5: The contact areas are defined using a photolithographic process
Step 6: Metallization and interconnection between substrate and source
7. What is used to higher the speed of operation in MOSFET fabrication?
A. Ceramic gate
B. Silicon dioxide
C. Silicon nitride
D. Polysilicon gate
Answer: D
In conventional metal gates, small overlap capacitance is present, which lowers the speed of operation. Due to the self-aligning property of the polysilicon gate, it eliminates this capacitance.
8. Why MOSFET is preferred over BJT in IC components?
A. MOSFET has a low packing density
B. MOSFET has a medium packing density
C. MOSFET has a high packing density
D. MOSFET has no packing density
Answer: C
No isolation island is required in the MOSFET structure because the drain of an n-mos device is held positive with respect to the source. This cutoff the drain to substrate diode and the source to substrate diode formed due to p+ region. In BJT, the isolation diffusion occupies an extremely large percentage of the chip area.
9. Which of the following statement is true?
A. Fabrication of p-mos transistor requires few additional steps compared to n-mos transistor
B. Fabrication of n-mos transistor requires few additional steps compared to p-mos transistor
C. Fabrication on n-mos is same as that of p-mos transistor
D. Fabrication on n-mos is different from that of p-mos transistor
Answer: A
There are two additional steps required in the formation of the p-mos transistor compared to the n-mos transistor. Such as the formation of n-region and ion implantation of p-type source and drain regions.
10. What is the best choice of IC package used for experimental purposes?
A. DIP package
B. Metal can package
C. Flatpack
D. Transistor pack
Answer: A
The DIP package is used as it is easy to mount. The mounting does not require bending or soldering of the leads.
