n a 1-φ full converter, Number of SCRs conducting during an overlap

n a 1-φ full converter, Number of SCRs conducting during an overlap

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Commutation is a process used to switch an SCR from its conducting state to its off-state. Sometimes we assume that the commutation is instantaneous. Actually, in practice, inductance and resistance must be present in the supply source, and time is required for a current change to take place. The net result is that the current commutation is delayed, as it takes a finite time for the current to decay to zero in the outgoing thyristor, while the current will rise at the same rate in the incoming thyristor. Thus, in practice, the commutation process may occupy a quite significant period of time, during which both the “incoming” and “outgoing” thyristors are simultaneous in conduction.

This period, during which both the outgoing and incoming thyristors are conducting, is known as the overlap period and the angle for which both devices share conduction is known as the overlap angle or commutation angle.

During this “commutation overlap” period, the waveforms of the voltage at the output terminals of the converter, as well as the current and voltage at the input terminal are different from those obtained with zero-source inductance. This has a modifying effect upon the external performance characteristics of the converter. 

Single-phase Full Converter

In the single-phase full converter shown in Fig, Ls is the source inductance. The load current is assumed constant and ripple free. The typical current and voltage waveforms with source inductance Ls.

From the waveform, it is observed that during commutation all the four thyristors conduct simultaneously for a period called overlap period, the corresponding angle is referred to as an overlap angle or commutation angle. Regarding the overlap period shown in waveform following observations can be made,

(a) The output voltage is zero during this period.

(b) Commutation overlap occurs twice per cycle, once T3 and T4 are turned on to commutate T1 and T2 and again when T1 and T2 are turned on to commutate T3, and T4. These commutation overlaps cause a reduction in the output voltage.

Current through the outgoing pair of SCRs gradually falls to zero, forcing the current in the incoming pair to rise gradually to Io from zero value. 

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