41. Which of the following is raised to the interrupt level to prevent the multiple interrupt request?
A. internal interrupt mask
B. external interrupt mask
C. non-maskable interrupt
D. software interrupt
Answer: A
The internal interrupt mask is raised to the interrupt level, to prevent the multiple interrupt acknowledgments.
42. What does MSR stand for?
A. machine state register
B. machine software register
C. minimum state register
D. maximum state register
Answer: A
The MSR is a machine state register. When the exception is recognized, the address of the instruction and the MSR is stored in the supervisor registers while handling an exception.
43. How many supervisor registers are associated with the exception mode?
A. 2
B. 3
C. 4
D. 5
Answer: A
When the exception is recognized, the address of the instruction and the machine state register(MSR) are stored in the supervisor registers in the exception mode. There are two supervisor registers SRR0 and SRR1.
44. What happens when an exception is completed?
A. TRAP instruction executes
B. SWI instruction executes
C. RFI instruction executes
D. terminal count increases
Answer: C
When an exception is recognized, the address of the instruction and the MSR are stored in the supervisor registers and the processor moves to the supervisor mode and starts to execute the handler which is associated with the vector table. The handler examines the DSISR and FPSCR registers and carries out the required function. When it gets completed the RFI or return-from-interrupt instruction is executed.
45. How many general types of exceptions are there?
A. 2
B. 3
C. 6
D. 4
Answer: D
There are four general types of exceptions. They are synchronous precise, asynchronous precise, synchronous imprecise, and asynchronous imprecise.
46. In which of the exceptions does the external event cause the exception?
A. synchronous exception
B. asynchronous exception
C. precise
D. imprecise
Answer: B
The asynchronous exception is the one in which an external event causes an exception and is independent of the instruction flow. On the other hand, the synchronous exceptions are synchronized, that is, it is caused by the instruction flow.
47. Which of the exceptions are usually catastrophic failures?
A. imprecise exception
B. precise exception
C. synchronous exception
D. asynchronous exception
Answer: A
An imprecise exception is a catastrophic failure in which the processor cannot continue processing or allow a particular task or program to continue.
48. Which of the exceptions allows the system reset or memory fault?
A. imprecise exception
B. precise exception
C. synchronous exception
D. asynchronous exception
Answer: A
The system reset or memory fault falls into the category of imprecise exceptions while accessing the vector table.
49. Which registers are used to determine the completion status?
A. MSR
B. flag register
C. DSISR
D. index register
Answer: C
The completion status can be determined by the information bits in the DSISR and FPSCR registers.
50. Which of the following does not support PowerPC architecture?
A. synchronous precise
B. asynchronous precise
C. synchronous imprecise
D. asynchronous imprecise
Answer: C
The synchronous imprecise is usually not supported on the PowerPC architecture and also in the MPC601, MPC603, etc.
