Interrupts and Exception in Embedded System MCQ Quiz – Objective Question with Answer for Interrupts and Exception in Embedded System

61. Which bit controls the external interrupts and the decrementer exceptions?

A. FE1
B. FE0
C. EE
D. ME

Answer: C

The EE bit in the MSR controls the external interrupts and the decrementer exceptions.

 

62. Which bit controls the machine check exceptions?

A. ME
B. FE0
C. FE1
D. EE

Answer: A

The ME bit in the MSR controls the machine check interrupts.

 

63. Which bits control the floating-point exceptions?

A. EE
B. FE0
C. FE1
D. both FE1 and FE2

Answer: D

The FE0 and FE1 control the floating-point exceptions.

 

64. Which of the following is a 16-kbyte block?

A. register
B. vector table
C. buffer
D. lookaside buffer

Answer: B

The vector table is a 16 kbyte block that is divided into 256-byte divisions in which each division is allocated for particular exceptions and it also contains the handler routine associated with the exceptions.

 

65. Which processors use fast interrupts?

A. DSP processor
B. RISC processor
C. CISC processor
D. Harvard processor

Answer: A

The fast interrupts are used in the DSP processors or in microcontrollers in which a small routine is executed without saving the context of the processor.

 

66. Which interrupts generate a fast interrupt exception?

A. internal interrupt
B. external interrupt
C. software interrupt
D. hardware interrupt

Answer: B

The external interrupts generate the fast interrupt routine exception in which the external interrupt is synchronized with the processor clock.

 

67. What is the disadvantage of fast interrupts?

A. stack frame
B. delay
C. size of routine
D. low speed

Answer: C

The disadvantages associated with the fast interrupt is the size of the routine that can be executed and the resources allocated. In this technique, it allocates a couple of address registers for the fast interrupt routine.

 

68. Which of the following does not have a stack frame building?

A. hardware interrupt
B. software interrupt
C. non-maskable interrupt
D. fast interrupt

Answer: D

The fast interrupt does not have stack frame building and it does not possess any such delays. This can be considered as the advantage of the fast interrupts.

 

69. What is programmed to generate a two-instruction fast interrupt?

A. software
B. application
C. timer
D. sensor

Answer: C

The SCI timer generates the two instruction fast interrupt. This increments the register R1.

 

70. Which of the following can auto-increment the register R1?

A. SCI timer
B. interrupt
C. software interrupt
D. non-maskable interrupt

Answer: A

The SCI timer is used to generate the two instruction fast interrupt that can increment the register R1 which acts as a simple counter.

 

71. Which of the following forces a standard service routine?

A. READY interrupt
B. IQRA interrupt
C. NMI
D. software interrupt

Answer: B

The SCI timer is used to generate the two instruction fast interrupt which increments the register R1 that acts as a simple counter which times the period between the events. The events themselves generate an IQRA interrupt, that forces the service routine.

 

72. Which of the following can be used as a reset button?

A. NMI
B. internal interrupt
C. external interrupt
D. software interrupt

Answer: A

The non-maskable interrupt is used to generate an interrupt to try and recover control and therefore, the NMI can be used as a reset button.

 

73. Which of the following is connected to a fault detection circuit?

A. internal interrupt
B. external interrupt
C. NMI
D. software interrupt

Answer: C

The non-maskable interrupt is used to generate an interrupt that can be connected to a fault detection circuit like a watchdog timer or parity checker.

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