Memory Organization of Embedded System MCQ Quiz – Objective Question with Answer for Memory Organization of Embedded System

The memory partitioning provides stability to the multitasking system so that the errors within one task will not corrupt the other tasks.

The M68000 uses memory partitioning by the use of function code or by the combination of superscalar signals and the Harvard architecture.

The finer grain protection of memory management is achieved by the addition of an extra description bit to an address to declare its status. The memory management unit can detect an error if the task attempts to access memory that has not been allocated to it or a certain kind of mismatch occurs.

In the workstation and the UNIX operating system, the virtual memory technique is frequently used in which the main memory is divided into different segments and pages. These pages will have a virtual address which can increase the address spacing.

The dual-in-line package consists of two lines of legs on both sides of the plastic or ceramic. Most commonly used are BIOS EPROMs, DRAM, and SRAM.

DIMM is a special version of SIMM which is a 168-bits wider bus and looks similar to a larger SIMM. The wider bus increases the memory speed and change in supply voltage.

The SIMM is basically a subassembly, not a package. It is a small board that possesses a finger connection on the bottom and sufficient memory on the board in order to make up the required configuration.

For increasing the speed and reducing the power consumption, it is necessary to reduce the power supply. Today’s CPUs and memories have a 3.3V supply or even lower instead of the signal level from 0 to 5V. DIMMs are described by their voltage, speed, and memory type respectively as 3.3V 133MHz SDRAM DIMM.

The Single-in-line package is the same as that of SIMM, in which the finger connections are replaced by a single row of pins. SIP took the popularity of SIMM but nowadays it is rarely seen.

The access time of the memory is defined as the maximum time taken by the chip to read/write data and it is very important to match the access time to the design. For example, MCM51000AP10 has a 100ns access time for the memory.