21. The depletion mode n-MOS as an active load is better than enhancement load n-MOS in:
A. Sharp VTC transition and better noise margins
B. Single power supply
C. Smaller overall layout area
D. All of the mentioned
22. The enhancement mode n-MOS load inverter requires 2 different supply voltages to:
A. Keep load transistor in the cutoff region
B. Keep load transistor in the linear region
C. Keep load transistor in the saturation region
D. None of the mentioned
23. The CMOS inverter consists of:
A. Enhancement mode n-MOS transistor and depletion mode p-MOS transistor
B. Enhancement mode p-MOS transistor and depletion mode n-MOS transistor
C. Enhancement mode p-MOS transistor and enhancement mode p-MOS transistor
D. Enhancement mode p-MOS transistor and enhancement mode n-MOS transistor
24. In the CMOS inverter the output voltage is measured across:
A. Drain of n-MOS transistor and ground
B. Source of p-MOS transistor and ground
C. Source of n-MOS transistor and source of p-MOS transistor
D. Gate of p-MOS transistor and Gate of n-MOS transistor
25. When the input of the CMOS inverter is equal to Inverter Threshold Voltage Vth, the transistors are operating in:
A. N-MOS is cutoff, P-MOS is in Saturation
B. P-MOS is cutoff, n-MOS is in Saturation
C. Both the transistors are in the linear region
D. Both the transistors are in the saturation region
26. The switching threshold voltage VTH for an ideal inverter is equal to:
A. (VDD-VOL)/2
B. VDD
C. (VDD)/2
D. 0
27. The electrical equivalent component for MOS structure is:
A. Resistor
B. Capacitor
C. Inductor
D. Switch