11. The expression for threshold voltage for the enhancement mode nMOSFET is:
A. Φgc-2ϕf-Qbo/Cox-Qox/Cox
B. Φgc+ϕf-Qbo/Cox
C. Φgc-ϕf-Qbo/Cox+Qox/Cox
D. Φgc+2ϕf-Qbo/Cox-Qox/Cox
12. Noise Margin is:
A. Amount of noise the logic circuit can withstand
B. Difference between VOH and VIH
C. Difference between VIL and VOL
D. All of the Mentioned
13. The VIL is found from the transfer characteristics of the inverter by:
A. The point where the straight line at VOH ends
B. The slope of the transition at a point at which the slope is equal to -1
C. The midpoint of the transition line
D. All of the mentioned
14. The VIH is found from the transfer characteristic of the inverter by:
A. The point where a straight line at VOH ends
B. The slope of the transition at a point at which the slope is equal to -1
C. The midpoint of the transition line
D. All of the mentioned
15. The relation between threshold voltage and Noise Margin is:
A. Vth = sqrt(Noise Margin)
B. Vth = NMH – NML
C. Vth = (NMH+NML)/2
D. None of the mentioned
16. The Lower Noise Margin is given by:
A. VOL – VIL
B. VIL – VOL
C. VIL ~ VOL(Difference between VIL and VOL, depends on which one is greater)
D. All of the Mentioned
17. The Higher Noise Margin is given by:
A. VOH – VIH
B. VIH – VOH
C. VIH ~ VOH(Difference between VIH and VOH, depends on which one is greater)
D. All of the mentioned
18. The Uncertain or transition region is between:
A. VIH and VOH
B. VIL and VOL
C. VIH and VIL
D. VOH and VOL
19. The noise immunity ____________ with noise margin.
A. Decreases
B. Increases
C. Constant
D. None of the Mentioned
20. If VIL of the 2nd gate is higher than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as:
A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned