21. If VIL of the 2nd gate is lower than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as:
A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
22. Input Voltage between VIL and VOL is considered as:
A. Logic Input 1
B. Logic Input 0
C. Uncertain
D. None of the mentioned
23. If VIH of the 2nd gate is higher than VOH of the 1st gate, then logic output 0 from the 1st gate is considered as:
A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
24. Noise margin of CMOS is:
A. Better than TTL and ECL
B. Less than TTL and ECL
C. Equal to TTL and ECL
D. None of the Mentioned
25. Noise in VLSI circuits means:
A. Unwanted signals that arise due to vibration in the passive circuits
B. Unknown signal that limits the minimum signal level that a circuit can process with acceptable quality
C. Signal which undergoes distortion
D. All of the mentioned
26. In probability Noise is described as:
A. Random function
B. Random process
C. Deterministic function
D. Deterministic process
27. Noise generated by independent devices are:
A. Correlated
B. Uncorrelated
C. Equal
D. None of the mentioned
28. The 2 types of noise that the analog systems face during signal processing are:
A. Device electronic noise and environmental noise
B. Noise due to Vibration and electronic noise
C. Passive and active noise
D. None of the mentioned
29. Thermal noise is generated from:
A. Resistor
B. Capacitor
C. Inductor
D. All of the mentioned
30. Thermal noise is generated from MOSFET by:
A. Conduction of charge carriers in the channel
B. Electric field across the gate and channel
C. Capacitance of the gate oxide
D. Substrate bias effect