1. The n-MOS invertor is better than BJT in terms of:
A. Fast switching time
B. Low power loss
C. Smaller overall layout area
D. All the mentioned
2. The n-MOS inverter consists of an n-MOS transistor is driven and
A. Resistor as a load
B. Depletion mode n-MOS as a load
C. Enhancement mode n-MOS as a load
D. Any of the mentioned
3. If the n-MOS and p-MOS of the CMOS inverters are interchanged the output is measured at:
A. Source of both transistor
B. Drains of both transistor
C. Drain of n-MOS and source of p-MOS
D. Source of n-MOS and drain of p-MOS
4. What will be the effect on output voltage if the positions of n-MOS and p-MOS in the CMOS inverter circuit are exchanged?
A. Output is the same
B. Output is reversed
C. Output is always high
D. Output is always low
5. The average power dissipated in resistive load n-MOS inverter is:
A. 0
B. VDD (VDD-VOL)/R
C. VDD (VDD-VOL)/2R
D. VDD (VDD-VIH)/2R
6. The depletion mode n-MOS as an active load is better than enhancement load n-MOS in:
A. Sharp VTC transition and better noise margins
B. Single power supply
C. Smaller overall layout area
D. All of the mentioned
7. The enhancement mode n-MOS load inverter requires 2 different supply voltages to:
A. Keep load transistor in the cutoff region
B. Keep load transistor in the linear region
C. Keep load transistor in the saturation region
D. None of the mentioned
8. The CMOS inverter consists of:
A. Enhancement mode n-MOS transistor and depletion mode p-MOS transistor
B. Enhancement mode p-MOS transistor and depletion mode n-MOS transistor
C. Enhancement mode p-MOS transistor and enhancement mode p-MOS transistor
D. Enhancement mode p-MOS transistor and enhancement mode n-MOS transistor
9. In the CMOS inverter the output voltage is measured across:
A. Drain of n-MOS transistor and ground
B. Source of p-MOS transistor and ground
C. Source of n-MOS transistor and source of p-MOS transistor
D. Gate of p-MOS transistor and Gate of n-MOS transistor
10. When the input of the CMOS inverter is equal to Inverter Threshold Voltage Vth, the transistors are operating in:
A. N-MOS is cutoff, P-MOS is in Saturation
B. P-MOS is cutoff, n-MOS is in Saturation
C. Both the transistors are in the linear region
D. Both the transistors are in the saturation region