nMOS and Complementary MOS (CMOS) MCQ Quiz – Objective Question with Answer for nMOS and Complementary MOS (CMOS) in VLSI

1. The n-MOS invertor is better than BJT in terms of:

A. Fast switching time
B. Low power loss
C. Smaller overall layout area
D. All the mentioned

Answer: D

The n-MOS invertor is better than BJT inverter due to its fast switching time, low power loss, and smaller overall layout area.

 

2. The n-MOS inverter consists of an n-MOS transistor is driven and

A. Resistor as a load
B. Depletion mode n-MOS as a load
C. Enhancement mode n-MOS as a load
D. Any of the mentioned

Answer: D

The n-MOS inverter consists of n-MOS and resistor or depletion mode n-MOS or enhancement mode n-MOS at the pull-up load.

 

3. If the n-MOS and p-MOS of the CMOS inverters are interchanged the output is measured at:

A. Source of both transistor
B. Drains of both transistor
C. Drain of n-MOS and source of p-MOS
D. Source of n-MOS and drain of p-MOS

Answer: A

When the transistors are interchanged, The drain of n-MOS is connected to the supply voltage, and the drain of p-MOS is connected to the ground. The output is measured at the source of both the transistors.

 

4. What will be the effect on output voltage if the positions of n-MOS and p-MOS in the CMOS inverter circuit are exchanged?

A. Output is the same
B. Output is reversed
C. Output is always high
D. Output is always low

Answer: B

When the input is low, P-MOS is ON and the output is pulled down to the ground. When the input is high, n-MOS is ON and the output is pulled up to the supply voltage.

 

5. The average power dissipated in resistive load n-MOS inverter is:

A. 0
B. VDD (VDD-VOL)/R
C. VDD (VDD-VOL)/2R
D. VDD (VDD-VIH)/2R

Answer: C

When the input voltage is equal to VOH on the other hand, both the driver MOSFET and the load resistor conduct a nonzero current. Since the output voltage, in this case, is equal to VOL, the DC power consumption of the inverter can be estimated as VDD (VDD-VOL)/2R.

 

6. The depletion mode n-MOS as an active load is better than enhancement load n-MOS in:

A. Sharp VTC transition and better noise margins
B. Single power supply
C. Smaller overall layout area
D. All of the mentioned

Answer: D

The depletion-mode n-MOS transistor as load requires a single power supply, a smaller overall layout area, and a sharp VTC transition.

 

7. The enhancement mode n-MOS load inverter requires 2 different supply voltages to:

A. Keep load transistor in the cutoff region
B. Keep load transistor in the linear region
C. Keep load transistor in the saturation region
D. None of the mentioned

Answer: B

The enhancement mode n-MOS load inverter requires 2 different supply voltages to keep the load transistor in the linear region.

 

8. The CMOS inverter consists of:

A. Enhancement mode n-MOS transistor and depletion mode p-MOS transistor
B. Enhancement mode p-MOS transistor and depletion mode n-MOS transistor
C. Enhancement mode p-MOS transistor and enhancement mode p-MOS transistor
D. Enhancement mode p-MOS transistor and enhancement mode n-MOS transistor

Answer: D

The CMOS inverter consists of enhancement mode P-MOS and enhancement mode n-MOS.

 

9. In the CMOS inverter the output voltage is measured across:

A. Drain of n-MOS transistor and ground
B. Source of p-MOS transistor and ground
C. Source of n-MOS transistor and source of p-MOS transistor
D. Gate of p-MOS transistor and Gate of n-MOS transistor

Answer: A

In the CMOS inverter, the output voltage is measured across the Drain of the n-MOS transistor and the ground.

 

10. When the input of the CMOS inverter is equal to Inverter Threshold Voltage Vth, the transistors are operating in:

A. N-MOS is cutoff, P-MOS is in Saturation
B. P-MOS is cutoff, n-MOS is in Saturation
C. Both the transistors are in the linear region
D. Both the transistors are in the saturation region

Answer: D

When the input of the CMOS inverter is equal to Inverter Threshold Voltage Vth, both the transistors are operating in the saturation region.

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