41. Introducing the FET differential amplifier pair at the input stage of the differential amplifier produces
A. High output resistance
B. High input resistance
C. Low input impedance
D. All of the mentioned
Answer: B
The input resistance of the order 1012 Ω is possible with JFET at the input stage of the differential amplifier.
42. Why active load is used in amplifiers to obtain a large gain in the intermediate stage of the amplifier?
A. To obtain a very large voltage gain
B. To get High input resistance
C. To reduce the noises
D. To increase current gain
Answer: A
To increase gain usually large collector resistance value as the gain is proportional to the load resistor. However, due to the limitation of the maximum value load resistor, active loads are used in amplifiers to obtain large gains in the intermediate stages of the amplifier.
43. Which circuit is used as an active load for an amplifier
A. Wildar Current source
B. Darlington pair
C. Current Mirror
D. All of the mentioned
Answer: C
The current mirror has DC resistance (order of a few kΩ), as the quiescent voltage across it is a fraction of supply voltage and current in milliampere.
44. What is the equation of load current for a differential amplifier with an active load?
A. IL = gm×vd
B. IL = Iq /2
C. IL = β×Iq×( Vin1 – Vin2)
D. IL = 2×gm/( Vin1 – Vin2)
Answer: A
The load current is given as the product of the difference between input & output voltage and transconductance. Therefore, the equation of load current is,
IL = gm×vd.
45. The input voltage of a difference amplifier is 2.5v and 4.9v. If the transconductance is 0.065Ω-1, determine the load current entering the next stage
A. 0.156A
B. 1.56A
C. 0.156mA
D. 15.6µA
Answer: A
Load current entering the next stages of the amplifier is the sum of individual load current, which is given by IL = IL1+ IL2 (Since only two input voltages are given).
46. Calculate the VI – VO for the level shifter shown in the figure (Assume an identical silicon transistor and a very large value of β). Transistor QA and QB form a current mirror.
A. 5.56V
B. 6.00v
C. 7.98v
D. 6.65v
Answer: D
Since the transistor QA and QB form current mirror, ICA= ICB = I.
=> I = (VCC – VBE) / R0 = (15v-0.7)/12k Ω (for β>>1, output current =input current)
=> I= 1.19mA.
The shift in level is given as VI – VO = VBE + I×R1
=0.07v+1.19mA×5kΩ =6.65v.
47. Load resistors (Re) are neglected for maximizing the voltage gain in the amplifier because,
A. Requires large chip are
B. Requires large power supply
C. Quiescent drop across Re increases
D. All of the mentioned
Answer: D
As the gain is proportional to the load resistor, a large resistance value is required. Due to the limitations mentioned, it is neglected.
48. What is the need for a level shifter in an operational amplifier?
A. Level the quiescent voltage
B. Remove distortion at the output
C. Limits the output voltage
D. Increase the quiescent voltage
Answer: C
Because of the direct-coupled, the DC level rises from stage to stage and tends to shift operating point. This limits output swing (Voltage).
49. Limitation of an output stage amplifier, if it emitter follower with complementary transistor
A. Cross-over distortion
B. Low impedance output
C. Shift in level
D. Active load current
Answer: A
The limitation in the amplifier is that the output voltage remains zero until the input voltage exceeds the cut in voltage VBE= 0.5v, which is known as cross-over distortion.
50. An output stage amplifier can produce an output signal when the input signal is
A. 0.48v
B. 0.9v
C. 1.2v
D. 0.5v
Answer: C
In an Output stage amplifier, due to cross-over distortion output voltage produces input voltage is greater than two times of cut-in voltage which is equal to 1v.
Since,
VBE= 0.5v
=> 2×VBE= 1v.
51. Find the disadvantage in the following circuit diagram:
A. Voltage get attenuated by R1
B. Voltage get attenuated by R2
C. Voltage get attenuated by R1 and R2
D. Voltage shift get increased by the drop across R1 and R2
Answer: B
The output taken at the junction of R1 and R2 increases the voltage shift. However, the disadvantage is that, the signal voltage gets attenuated by R2.
