RISC Processor MCQ Quiz – Objective Question with Answer for RISC Processor

11. Which company further developed the study of RISC architecture?

A. Intel
B. Motorola
C. university of Berkeley
D. MIPS

Answer: C

The University of Berkeley and Stanford university provides the basic architecture model of RISC.

 

12. Princeton architecture is also known as

A. von Neumann architecture
B. Harvard
C. RISC
D. CISC

Answer: A

The von Neumann architecture is also known as the von Neumann model or Princeton architecture.

 

13. Who coined the term RISC?

A. David Patterson
B. von Neumann
C. Michael J Flynn
D. Harvard

Answer: A

David Patterson of Berkeley university coined the term RISC whereas Michael J Flynn first views RISC.

 

14. Which of the following is an 8-bit RISC Harvard architecture?

A. AVR
B. Zilog80
C. 8051
D. Motorola 6800

Answer: A

AVR is an 8-bit RISC architecture developed by Atmel. Zilog80, 8051, and Motorola 6800 are having CISC architectures.

 

15. Which of the following processors has CISC architecture?

A. AVR
B. Atmel
C. Blackfin
D. Zilog Z80

Answer: D

Zilog80 has CISC architecture whereas AVR, Atmel, and blackfin possess RISC architecture.

 

16. What are the factors of filters that are determined by the speed of the operation in a digital signal processor?

A. attenuation constant
B. frequency
C. bandwidth
D. phase

Answer: C

The bandwidth of any filter depends on the speed of operations held in a digital signal processor.

 

17. How many tables does an FIR function of a digital signal processor possess?

A. 1
B. 2
C. 3
D. 4

Answer: B

The Digital signal processor function involves the setting up of two tables one is for sampled data and the other table is for filter coefficients which determine the filter response. It takes values from the table and performs programs.

 

18. Why is said that branch prediction is not applicable in a digital signal processor?

A. low bandwidth
B. high bandwidth
C. low frequency
D. high frequency

Answer: A

Loop control timing varies depending on the branch predictions which in turn make bandwidth predictions difficult thereby lowering the bandwidth of the digital signal processor.

 

19. Which architecture can one overcome the low bandwidth issue in the MC6800 family?

A. RISC
B. CISC
C. von Neumann
D. program stored

Answer: A

RISC architecture can offer some improvement in the low bandwidth issue since it has the ability to perform operations in a single cycle.

 

20. Which architecture in the digital signal processor reduces the execution time?

A. Harvard
B. CISC
C. program storage
D. von Neumann

Answer: A

Harvard architecture in a digital signal processor allows continuous data fetching and performing the corresponding instructions.

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