Thin Film and Thick Film IC Technology MCQ [Free PDF] – Objective Question Answer for Thin Film and Thick Film IC Technology Quiz

1. When does an integrated circuit exhibit a greater degree of freedom and electrical performance?

A. In thin and thick film technology
B. In semiconductor technology
C. In semiconductor and films technology
D. In thick film technology only

Combining films and semiconductor technology provides better electrical performance than either technology can provide separately.

2. Give the thickness range of the film used in thin-film technology

A. 0.5-2.5 mils
B. 0.02-8 mils
C. 10-20 mils
D. 0.05-0.0 7mils

Thin films have thickness varying from 50 Å to 20,000 Å.

W.k.t, 1 Å=0.4 µmil,

=>50 Å=50 × 0.4µmil=0.02 mmil,

=>20,000 Å=20, 000*0.4µmil=8 mmil,

=>therefore, the thickness range from 0.02-8 mmil.

3. Which technology is used to get cheap resistors and capacitors?

A. Thick film technology
B. Thin film technology
C. Thin and thick film technology
D. None of the mentioned

Thick film technology produces cheap and rugged components, whereas thin-film technology provides greater precision in manufacturing but is quite expensive. The processing equipment for thick film circuits is relatively inexpensive and easy to use.

4. How is the process of film deposition carried out in cathode sputtering?

A. Slower than evaporation method
B. Faster than evaporation method
C. Similar to same as an evaporation method
D. All of the mentioned

Cathode sputtering and vacuum evaporation use an identical system. However, the process of film deposition in cathode sputtering is slower than the evaporation method. Since depositing a micron-thick film takes minutes to hours, compared to seconds to minutes for evaporation.

5. How a uniform film with a good crystal structure is attained in the cathode sputtering process?

A. By hitting high energy particles directly on the substrate
B. Allowing Less time for the particles to deposit on the substrate
C. High energy particles diffuse through low-pressure gas and deposit on the substrate
D. Heavy inert gas is used for film deposition on the substrate

The process of cathode sputtering is performed at low pressure (about 10-12 torr). So, when the high-energy particle landing on the substrate actually results in a very uniform film and adhesion.

6. Which process is used to deposit metals on glass, ceramic, and plastic?

A. Silk plating technique
B. Gas plating technique
C. Electroless plating technique
D. Electroplating technique

In electroless plating, a metal ion in the solution is reduced to the free metal and deposited as a metallic coating without the use of an electric current. Thus, this process is used in plating on glass, ceramic, and plastic.

7. Electroplating technique is suitable for

A. Making conduction films ceramic
B. Coating with considerable thickness
C. Coating without the use of electric current
D. Making conduction films of gold or copper

Electroplating is the process of coating an object with one or more layers of different metals. When dc is passed through the electrolytic solution, the positive metal ions migrate from an anode (metal) and deposit on the cathode (substrate).

8. Which of the following process is involved in thick-film technology?

A. Screen printing
B. Ceramic firing
C. Silkscreening
D. All of the mentioned

Silk screening is one of the processes of thick-film technology. The silkscreen is a layer of ink trace used to identify the PCB components, marks, logos, symbols, and so on.

If you see, a PCB comprises two parts – components and soldering. Mostly, the silkscreen is applied to the component part of the PCB. Nowadays, it is also applied to the soldering part.

9. An ancient process used till today for the production of circuit films is,

A. Silk Screening technique
B. Surface Mount Technology
C. Ceramic Printing technique
D. Screen Printing technique

The process of screen printing patterns is an ancient one. The Egyptians used this technique thousands of years ago to decrease potter and wall of buildings.

10. What is the advantage of using Surface Mount Technology?

A. All of the mentioned
B. Low power consumption
C. Reduces heat dissipation in components

Surface Mount Technology utilizes micro-miniature leaded or leadless components called Surface Mount Device (SMD. which are directly soldered to the specified areas on the surface without holes. Also, the compact size of SMDs reduces the area in PCB and increases the packing density.

11. JFET is similar to the fabrication of

A. Diode fabrication
B. BJT fabrication
C. FET fabrication
D. None of the mentioned

The basic processes used are as same as BJT fabrication. The epitaxial layer (collector of BJT) is used as the n-channel of JFET. The p+ is formed in the n-channel by the process of diffusion and the n+ region is formed underdrain and the source provides good ohmic contact.

13. What are the types of MOSFET devices available?

A. P-type enhancement type MOSFET
B. N-type enhancement type MOSFET
C. Depletion type MOSFET
D. All of the mentioned

MOSFETs are available as Enhancement types and depletion types MOSFET. These are further classified into n-type and p-type devices.

14. Which insulating layer is used in the Fabrication of MOSFET?

A. Aluminium oxide
B. Silicon Nitride
C. Silicon dioxide
D. None of the mentioned

Silicon dioxide is used as an insulating layer in MOSFET Fabrication. It gives an extremely high input resistance in the order of 1010 to 1015 Ω for MOSFET.

15. Which of the following plays an important role in improving the device performance of MOSFET?

A. Dielectric constant
B. Threshold voltage
C. Power supply voltage
D. Gate to drain voltage

In MOSFET, the threshold voltage is typically 3 to 6v. This large voltage is not compatible with 5v supply used in digital IC. So, to improve device performance, the magnitude of threshold voltage should be reduced.

16. A technique used to reduce the magnitude of the threshold voltage of MOSFET?

A. Use of complementary MOSFET
B. Use of Silicon nitride
C. Using thin-film technology
D. None of the mentioned

Silicon nitride is sandwiched between two SiO2 layers and provides the necessary barrier. The dielectric constant of Si3N4 is 7.5, whereas that of SiO2 is 4. This increase in the overall dielectric constant reduces threshold voltage.

17. Find the sequence of steps involved in the fabrication of polysilicon gate MOSFET?

Step 1: Entire wafer surface of a Si3N4is coated and it is etched away with the help of a mask to include the source, gate, and drain.
Step 2: The contact areas are defined using a photolithographic process
Step3: Selective etching of Si3N4 and thin oxide growth
Step 4: Deposition of polysilicon gate
Step 5: thick oxide growth called field oxide and P implantation
Step 6: Metallization and interconnection between substrate and source

A. 1->5->3->4->2->6
B. 1->3->4->2->5->6
C. 1->5->4->3->2->6
D. 1->4->2->5->3->6

The mentioned steps are the sequence of steps involved in the fabrication of polysilicon gate MOSFET.

Step 1: Entire wafer surface of a Si3N4is coated and it is etched away with the help of a mask to include the source, gate, and drain.

Step 2: thick oxide growth called field oxide and P implantation

Step3: Selective etching of Si3N4 and thin oxide growth

Step 4: Deposition of polysilicon gate

Step 5: The contact areas are defined using a photolithographic process

Step 6: Metallization and interconnection between substrate and source

18. What is used to higher the speed of operation in MOSFET fabrication?

A. Ceramic gate
B. Silicon dioxide
C. Silicon nitride
D. Polysilicon gate

In conventional metal gates, small overlap capacitance is present, which lowers the speed of operation. Due to the self-aligning property of the polysilicon gate, it eliminates this capacitance.

19. Why MOSFET is preferred over BJT in IC components?

A. MOSFET has a low packing density
B. MOSFET has a medium packing density
C. MOSFET has a high packing density
D. MOSFET has no packing density

No isolation island is required in the MOSFET structure because the drain of an n-mos device is held positive with respect to the source. This cutoff the drain to substrate diode and the source to substrate diode formed due to p+ region. In BJT, the isolation diffusion occupies an extremely large percentage of the chip area.

20. Which of the following statement is true?

A. Fabrication of p-mos transistor requires few additional steps compared to n-mos transistor
B. Fabrication of n-mos transistor requires few additional steps compared to p-mos transistor
C. Fabrication on n-mos is same as that of p-mos transistor
D. Fabrication on n-mos is different from that of p-mos transistor