201. Design rule is not influenced by the maturity of the property line.
A. true
B. false
Answer: A
Design rules can also be influenced by the maturity of the process line. If the process is mature, then one can be assured of the process line capability allowing tighter design with fewer constraints.
202. The separation between implants is determined from
A. width of the transistor
B. width of E-MESFET
C. width of D-MESFET
D. width of the photoresist
Answer: D
The separation between implants is determined by the width of the depletion region and the width of the photoresist.
203. MESFETs should be positioned
A. horizontally
B. vertically
C. diagonally
D. randomly
Answer: A
All MESFETs should be positioned horizontally owing to the anisotropic nature of GaAs which influences the threshold voltage of the device.
204. The saturated resistor is a
A. FET with schottky gate
B. FET without Schottky gate
C. MESFET with schottky gate
D. MESFET without Schottky gate
Answer: D
The saturated resistor is a MESFET with the Schottky gate removed. The preferred direction for layout is vertical.
205. MIM capacitor uses
A. metal 1
B. metal 2
C. metal 1 and metal 2
D. Schottky gate
Answer: C
The metal-insulator-metal (MIM) capacitor structure is simple using metal 1 and metal 2 as the plates of a parallel plate capacitor.
206. The mask is derived from the structural operation of masks.
A. true
B. false
Answer: B
The mask is derived from the logical operation of the active layer masks. Some processes require isolation between devices to reduce their interaction.
207. Normally-on logic uses
A. depletion mode MESFET
B. enhancement mode MESFET
C. depletion-mode FET
D. enhancement mode FET
Answer: B
Normally-on logic uses depletion-mode MESFETs which are ON devices and when used as switching elements are required to be turned OFF.
208. Which is the approach used for normally-off logic?
A. capacitor diode FET logic
B. buffered FET logic
C. direct-coupled FET logic
D. capacitor coupled FET logic
Answer: C
The approaches used for normally-off logic are direct-coupled FET logic, buffered DCFL, and source-follower DCFL.
209. __________ is needed to facilitate turn-off.
A. positive voltage
B. power supply rail
C. ground connection
D. negative voltage
Answer: D
Negative voltage is needed to facilitate turn-off.
Since D-MESFETs are ON devices, a negative voltage is needed at the gate to facilitate turn-off.
210. __________ supply rails are required for proper operation of normally-on logic devices.
A. one
B. two
C. three
D. four
Answer: B
Two supply rails together with level shifting networks are necessary for proper circuit operation of normally-on logic gates.
211. In direct coupled FET logic, both depletion and enhancement mode devices are used.
A. true
B. false
Answer: A
In direct-coupled FET logic, both the depletion mode and enhancement mode transistors are used. Enhancement mode FET is used as the switching element and depletion mode FET is used as load.
212. DCFL circuits have
A. large voltage swing
B. small voltage swing
C. large noise margins
D. more complexity
Answer: B
In direct-coupled FET logic, only small voltage swings are possible and also relatively small noise margins.
213. Which circuits have weak load drive capability?
A. DCFL
B. DCFL with super buffers
C. FET logic
D. SDCFL
Answer: A
DCFL circuits have weak load drive capability. This can be improved by the introduction of super buffers with the expense of extra area.
214. Which logic is suitable for large loads?
A. DCFL
B. DCFL with super buffers
C. FET logic
D. SDCFL
Answer: B
DCFL with super buffers is used for larger loads to be driven whereas DCFL circuits are used for light load conditions.
215. Which circuit has a large noise margin?
A. DCFL
B. DCFL with super buffers
C. FET logic
D. SDCFL
Answer: D
Source follower DCFL FET logic has power dissipation and also switching delay. This has a larger noise margin which is due to the pull-up transistor being able to be turned off.
216. Which logic is suitable for the And-OR-Invert function?
A. DCFL
B. DCFL with super buffers
C. FET logic
D. SDCFL
Answer: D
The source-follower DCFL FET logic is most suitable for the realization of the And-OR-Invert function which usually assists in the optimization of logical functions.
217. Field-effect transistor uses ________ to control the shape.
A. electric field
B. magnetic field
C. current distribution
D. voltage distribution
Answer: A
Field-effect transistor uses an electric field to control the shape and hence the electrical conductivity of the channel.
218. Field-effect transistors are known as
A. unipolar device
B. bipolar device
C. tripolar device
D. multipolar device
Answer: A
Field-effect transistors are unipolar transistors as they involve single-carrier-type operations.
A unipolar transistor is a field-effect transistor (FET) that uses only one type of charge for conduction from drain to the source i.e. either electron (n-channel FET) or holes (P-channel FET).
219. The FET has __________ input impedance.
A. low
B. high
C. all of the mentioned
D. none of the mentioned
Answer: B
Field-effect transistors have high input impedance. The conductivity of non-FET transistors is regulated by the input current thus it has low input impedance.
220. Field-effect transistor’s conductivity is regulated by
A. input current
B. output current
C. terminal voltage
D. supply voltage
Answer: C
Field-effect transistor’s conductivity is regulated by the voltage applied to a terminal (the gate) which is insulated from the device.
221. In FET, the current enters the channel through
A. source
B. drain
C. gate
D. nodes
Answer: A
In a field-effect transistor, the current enters the channel through the source and the current leaves the junction through the drain.
222. Which terminal bias the transistor to operation?
A. source
B. drain
C. gate
D. base
Answer: D
Other than the three terminals, source-drain, and gate, there is a fourth terminal called a body or base. This is used to bias the transistor to operation.
223. In FET, the width is greater than the length of the gate.
A. true
B. false
Answer: A
In FET, the width is greater than the length of the gate. Length gives the distance between source and drain. Width is the extension of the transistor, in the direction perpendicular to the cross-section.
224. Which terminal controls the electron flow passage?
A. source
B. drain
C. gate
D. base
Answer: C
Gate permits the electron to flow through or block their passage by creating or eliminating the channel between source and drain.
225. The expansion of the depletion region in the n-channel device makes the channel
A. narrow
B. wide
C. does not affect the channel
D. cannot be determined
Answer: A
In the n-channel depletion mode device, as the depletion region width expands, it encroaches the channel from the sides and the channel becomes narrow.
226. Which voltage increases the channel size?
A. negative Vgs
B. positive Vgs
C. negative Vds
D. positive Vds
Answer: B
A positive gate to source voltage increases the channel size and allows the electrons to flow easily.
227. Which FET relation is correct?
A. Vgs greater than Vds
B. Vds greater than Vgs
C. Vds equal to Vgs
D. Vgs lesser than Vds
Answer: A
In FET, for either depletion or enhancement mode devices, the drain to source voltage is much less than the gate to source voltage.
228. Which mode of operation of FET is used, when amplification is needed?
A. active
B. saturation
C. non-saturation
D. linear
Answer: B
Saturation mode of operation of FET is used, when amplification is needed.
Saturation mode, which is in between the ohmic and saturation region is used when amplification is needed.
