Universal Asynchronous Receiver-Transmitter (UART) MCQ Quiz – Objective Question with Answer for UART

MR is the master reset pin that helps to reset the device and restore the internal registers.

RCLK provides an input clock for the receiver part of the UART. RD is the read signal. MR is the master reset pin and DDIS is used to control bus arbitration logic.

There are two general purposes I/O pin OUT1 and OUT2. OUT1 is set by the programming bit 2 of the MCR to a ‘1’ whereas OUT2 is set by the programming bit 3 of the MCR to ‘1’. These are active low pins in 8250.

RD and WR signals are indicating the type of access that the CPU needs to perform, that is, whether it is a read cycle or write cycle.

The RXRDY and TXRDY are two active-low pins that are used for additional DMA control. It can be used for DMA transfers to and from the read and write buffers.

The CPU is responsible for moving data to and from the UART in the IBM PC, therefore it does not have TXRDY and RXRDY pins which are used for DMA accessing.

The XIN and XOUT pins are used to connect an external crystal. These pins can also connect to an external clock.

The MC68681 is a standard UART developed by Motorola. It has been used in many MC680 by 0 designs.

The largest buffer of 16 bytes is available on 16550 UART which is used for high-speed data communications.

The MC68681 is a standard UART developed by Motorola. It possesses a quadruple buffered receiver and a double-buffered transmitter.