21. In which method minimum number of adder cells are used?
A. Baugh-Wooley algorithm
B. Wallace trees
C. Dadda multipliers
D. Modified booth encoding
Answer: C
Dadda multipliers are similar to Wallace trees but it has a reduced number of adder cells. This is a technique developed from Wallace’s tree but with an improvement.
22. Which method is suitable for larger operands?
A. Baugh-Wooley algorithm
B. Wallace trees
C. Dadda multipliers
D. Modified booth encoding
Answer: B
Wallace tree multipliers should be used for larger operands and where the performance is critical.
23. Microprocessor has __________ major architectural blocks.
A. two
B. three
C. four
D. five
Answer: C
The microprocessor has four major architectural blocks – ALU, control unit, I/O unit, and memory.
24. High level of system integration __________ interconnections.
A. reduces
B. increases
C. does not affect
D. doubles
Answer: A
A high level of system integration usually greatly reduces interconnections which is a weak spot in any system.
25. Some important features of the system are
A. lower weight
B. lower volume
C. lower power dissipation
D. all of the mentioned
Answer: D
Lower power dissipation, lower weight, and lower volume are some of the important features of the system.
26. Performance is better if the power speed product is
A. low
B. high
C. very low
D. very high
Answer: B
Performance is better if the power speed product is high. Performance is analyzed using this speed power product.
27. VLSI design is done in _________ approach.
A. top-down
B. bottom-up
C. random
D. semi-random
Answer: A
VLSI design is done in a top-down manner with adequate computer-aided tools to do the job. Partitioning, generating or building, and verification are done.
28. Components operating in high frequency should be
A. far apart
B. closely spaced
C. randomly spaced
D. can be placed in a straight manner
Answer: B
Components operating in high frequency should be physically proximate, since one may pay severe penalties for long, high bandwidth interconnects.
29. Approach used for the design process is
A. circuit symbols
B. logic symbols
C. stick diagrams
D. all of the mentioned
Answer: D
Several approaches used for the design process are conventional circuit symbols, logic symbols, stick diagrams, mask layouts, architectural block diagrams, and floor plans.
30. Which approach is used to show the relative disposition of subunits?
A. architectural block diagram
B. stick diagram
C. layout diagram
D. floor plan
Answer: D
The floor plan is used to show the planned relative disposition of the subunits on the chip and thus on mask layouts.
