1. Microprocessor has __________ major architectural blocks.
A. two
B. three
C. four
D. five
Answer: C
The microprocessor has four major architectural blocks – ALU, control unit, I/O unit, and memory.
ALU performs arithmetical and logical operations on the data received from the memory or an input device.
2. High level of system integration __________ interconnections.
A. reduces
B. increases
C. does not affect
D. doubles
Answer: A
A high level of system integration usually greatly reduces interconnections which is a weak spot in any system.
3. Some important features of the system are
A. lower weight
B. lower volume
C. lower power dissipation
D. all of the mentioned
Answer: D
Lower power dissipation, lower weight, and lower volume are some of the important features of the system.
4. Performance is better if the power speed product is
A. low
B. high
C. very low
D. very high
Answer: B
Performance is better if the power speed product is high. Performance is analyzed using this speed power product.
5. VLSI design is done in _________ approach.
A. top-down
B. bottom-up
C. random
D. semi-random
Answer: A
VLSI design is done in a top-down manner with adequate computer-aided tools to do the job. Partitioning, generating or building, and verification is done.
6. Components operating in high frequency should be
A. far apart
B. closely spaced
C. randomly spaced
D. can be placed in a straight manner
Answer: B
Components operating in high frequency should be physically proximate, since one may pay severe penalties for long, high bandwidth interconnects.
7. Approach used for the design process is
A. circuit symbols
B. logic symbols
C. stick diagrams
D. all of the mentioned
Answer: D
Several approaches used for the design process are conventional circuit symbols, logic symbols, stick diagrams, mask layouts, architectural block diagrams, and floor plans.
8. Which approach is used to show the relative disposition of subunits?
A. architectural block diagram
B. stick diagram
C. layout diagram
D. floor plan
Answer: D
The floor plan is used to show the planned relative disposition of the subunits on the chip and thus on mask layouts.
9. When polysilicon crosses a diffusion _______ will be formed.
A. via
B. transistor
C. switch
D. short circuit
Answer: B
When and wherever the polysilicon crosses the diffusion, a transistor will be formed.
A Transistor is a three-terminal semiconductor device that regulates current or voltage flow and acts as a switch or gate for signals.
10. Two metal layers can be joined by using
A. contact cut
B. wire
C. via
D. glass
Answer: C
The first metal layer can be joined with the second one using via an electrical connection between layers in a physical electronic circuit.
11. The bottom subfunction is called as
A. lower function
B. low cell
C. leaf cell
D. bottom cell
Answer: C
The complex function is divided into many subfunctions and the bottom level of these sub-functions are called leaf cells.
12. Which must be given the highest priority in the design process?
A. architecture
B. communication
C. color
D. thickness
Answer: B
Communication must be given the highest priority in the design process as interconnections pose the most acute problems in the design of large systems.
13. Design gives a detailed
A. logic circuit design
B. topology of the communication
C. color codes of the layers
D. functions of layers
Answer: B
Design is largely a matter of topology of communication rather than the detailed logic circuit design.
14. To minimize the design effort, regularity should be
A. low
B. high
C. very low
D. very high
Answer: B
Regularity is a qualitative parameter and it should be high as possible to minimize the design effort required for any system.
15. Regularity is the ratio of
A. total transistors in the chip to total transistors that must be designed in detail
B. total transistors that must be designed in detail to total transistors in a chip
C. total transistors to total components
D. total charge storage components to charge dissipating components
Answer: A
Regularity is the ratio of total transistors in the chip to total transistors that must be designed in detail.
16. Good design system has regularity in the range of
A. 25-50
B. 50-75
C. 50-100
D. 25-50
Answer: C
A good design system must have regularity in the range of 50 to 100 or more and regular structures such as memories achieve very high figures.
17. In the adder, the sum is stored in
A. series
B. cascade
C. parallel
D. registers
Answer: C
The sum is stored in parallel at the output of the adder from where it may be fed through the shifter and back to the register array.
18. The shifter must be connected to
A. 2-shift data line
B. 2-shift control line
C. 4-shift data line
D. 4-shift control line
Answer: D
The shifter is unclocked but must be connected to 4 shift control lines. Carry out and Carry in signal must also be connected.
19. What is the sum and carry if the two-bit number is 1 1 and the previous carry is 0?
A. 0, 0
B. 0, 1
C. 1, 0
D. 1, 1
Answer: B
If the two-bit number is 1 1 and the previous carry is 0 the sum is 0 and the carry is 1. This can be obtained by first adding the two numbers 1 and 1. The sum will be 0 and the carry is 1. Later add the previous carry 0 to it. Now the sum is finally 0 and the final carry will be 1.
20. Which design is preferred in the n-bit adder?
A. many pass transistors in series
B. many pass transistors with a suitable buffer
C. many pass transistors without suitable buffer
D. many pass transistors in parallel
Answer: B
In n-bit adder, n adder elements must be cascaded with carrying out connecting to carry in. This carry chain will have more pass transistors connected in series which will give a slow response. Thus suitable buffer can be used in between.
