A. Decoders
B. Clock generators
C. Circuits with feedback
D. All of the mentioned
Answer: D
The poor controllability circuits are due to
Decoders
Clock generators
Circuits with feedback
12. The circuits with poor observability are:
A. ROM
B. PLA
C. Sequential circuits with long feedback loops
D. All of the mentioned
Answer: C
The circuits with poor observability are sequential circuits with long feedback loops.
13. A Large number of input vectors are used to set a particular node (1) or (0), to propagate an error at the node to output making the circuit low on:
A. Testability
B. Observability
C. Controllability
D. All of the mentioned
Answer: A
The circuit is said to be low on Testability if the large number of input vectors are used to set a particular node (1) or (0), to propagate an error at the node to output.
14. Divide and Conquer approach to large and complex circuits for testing is found in:
A. Partition and Mux Technique
B. Simplified automatic test pattern generation technique
C. Scan based technique
D. All of the mentioned
Answer: A
The divide and Conquer approach to large and complex circuits for testing is found in the partition and Mux technique.
15. LSSD stands for:
A. Linear system synchronous detection
B. Level sensitive system detection
C. Level sensitive scan design
D. Level sensitive scan detection
Answer: C
LSSD stands for Level sensitive scan design. The level-sensitive scan design technique was developed and pioneered by IBM and forms the basis for a structured approach to the design of testable circuits.
16. Which are processing faults?
A. missing contact window
B. parasitic transistor
C. oxide breakdown
D. all of the mentioned
Answer: D
Some of the real defects in chips such as processing faults are missing contact windows, parasitic transistor,s and oxide breakdown.
17. Surface impurities occur due to ion migration.
A. true
B. false
Answer: A
Some of the material defects are bulk defects and surface impurities. Bulk defects are cracks and crystal imperfection and surface impurities occur due to ion migration.
18. Electromigration is a
A. processing fault
B. material defects
C. time-dependent failure
D. packaging fault
Answer: C
Different types of real defects in chips are processing faults, material defects, time-dependent failures, and packaging faults. Time-dependent failures are dielectric breakdown and electromigration.
19. Which relation is correct?
A. failure – error – fault
B. fault – error – failure
C. error – fault – failure
D. error – failure – fault
Answer: B
The relation fault – error – failure is correct. Error is caused by faults and failure which is a deviation of the circuit caused by error.
20. For a circuit with k lines __________ single stuck-at fault is possible.
A. k
B. 2k
C. k/2
D. k2
Answer: B
For a circuit with k lines, 2k single stuck-at faults are possible and 3k – 1 multiple stuck-at faults are possible.
