VLSI Driver MCQ Quiz – Objective Question with Answer for VLSI Driver

21. Small disturbances of noise ___________

a) decreases the inverter voltage
b) increases the output voltage
c) switches the inverter stage between 0 to 1
d) does not switch the stage and keeps it stable

Answer: c

Small disturbances of noise switch the inverter stage between 0 and 1 or vice versa. It disturbs the normal operation or behavior.

 

22. The buffer speeds up the ___________

a) rise time
b) fall time
c) all of the mentioned
d) none of the mentioned

Answer: a

The buffer speeds up the rise time of propagated signal edge. A buffer is the combination of two inverters in which one output is fed to the other as the input.

 

23. Overall delay increases as n ___________

a) increases
b) decreases
c) exponentially decreases
d) logarithmically decreases

Answer: a

Overall delay increases as n increases where n is the number of pass transistors connected in series.

 

24. Which contributes to the wiring capacitance?

A. fringing fields
B. interlayer capacitance
C. peripheral capacitance
D. all of the mentioned

Answer: D

The sources of capacitance that contribute to the total wiring capacitance are fringing field capacitance, interlayer capacitance, and peripheral capacitance.

 

25. What does the value d in fringing field capacitance measure?

A. thickness of wire
B. length of the wire
C. wire to substrate separation
D. wire to wire separation

Answer: C

The quantity d in fringing field capacitance measures the wire to substrate separation. It is the distance between the wire and the substrate used in the device.

 

26. Total wire capacitance is equal to ___________

A. area capacitance
B. fringing field capacitance
C. area capacitance + fringing field capacitance
D. peripheral capacitance

Answer: C

Total wire capacitance can be given as the sum of area capacitance and fringing field capacitance.

 

27. Interlayer capacitance occurs due to ___________

A. separation between plates
B. electric field between plates
C. charges between plates
D. parallel plate effect

Answer: D

Interlayer capacitance occurs due to a parallel plate effect between one layer and another. When one capacitance value comes closer to another they create some combined effects.

 

28. Which capacitance must be higher?

A. metal to polysilicon capacitance
B. metal to substrate capacitance
C. metal to metal capacitance
D. diffusion capacitance

Answer: A

Metal to polysilicon capacitance should be higher than metal to substrate capacitance. This is that when one layer underlies the other and in consequence, interlayer capacitance is highly dependent on layout.

 

29. Peripheral capacitance is given in _________ per unit length.

A. nano farad
B. picofarad
C. microfarad
D. farad

Answer: B

Peripheral capacitance is given in picofarads per unit length. This is the sidewall capacitance. Each diode has this sidewall capacitance.

 

30. For greater relative value of peripheral capacitance ___________ should be small.

A. source area
B. drain area
C. source & drain area
D. none of the mentioned

Answer: C

The smaller the source or drain area, the greater the relative value of peripheral capacitance as they are both inversely related.

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