VLSI GaAs Fabrication MCQ Quiz – Objective Question with Answer for GaAs Fabrication in VLSI

21. Which method uses plasma excitation?

A. PECVD
B. low-pressure CVD
C. high-pressure CVD
D. sputtering

Answer: A

PECVD (plasma-enhanced chemical vapor deposition) method uses plasma excitation in addition to usual thermal energy.

 

22. Which causes degradation of transconductance?

A. low source resistance
B. high source resistance
C. low drain resistance
D. high drain resistance

Answer: B

The very thin undepleted n- layer causes high source resistance and this causes the degradation of the transconductance gm.

 

23. Cuts are not needed for

A. ohmic contacts
B. Schottky barriers
C. interconnect metallizations
D. joining two layers

Answer: D

Cuts are made in dielectric only where ohmic contacts, Schottky barriers, and interconnect metallizations are required and not for joining any two layers.

 

24. Which is the less costly material that can be used for first-level metal?

A. gold
B. platinum
C. aluminum
D. titanium

Answer: C

Gold is the more costly material used for first-level and second-level metal layers whereas aluminum is the less costly material that can be used.

 

25. ________ is controlled by varying ion flux and velocity.

A. doping density
B. doping thickness
C. doping rate
D. doping material

Answer: A

Doping density and dopants distribution in the semi-insulating material is controlled by varying the ion flux and velocity.

 

26. The extent of damage to crystal depends on

A. target mass
B. mass of the implanted ion
C. dose
D. all of the mentioned

Answer: D

The extent of damage to the crystal depends on several factors such as the mass of the implanted ion, target mass, energy associated with the ion, dose, temperature, and displacement energies.

 

27. Which has a lightly doped channel?

A. E-MOSFET
B. D-MOSFET
C. E-JFET
D. CE-JFET

Answer: A

The E-MOSFET structure is similar to that of D-MOSFET except for a shallower and more lightly doped channel.

 

28. To begin conduction, E-MOSFET requires

A. negative gate voltage
B. positive gate voltage
C. negative drain voltage
D. positive drain voltage

Answer: B

In E-MOSFET channel is in pinch-off at zero gate voltage. A positive gate voltage is required for the channel to begin conduction.

 

29. Wafer preparation takes place in

A. first-level metal phase
B. second-level metal phase
C. encapsulation phase
D. ion implantation phase

Answer: C

The encapsulation phase is the first phase and it includes wafer preparation. Encapsulation is a process of deposition of first-level insulator Si3N4.

 

30. Steps involved in the ion implantation phase are

A. metallization
B. anneal
C. alignment mark mask
D. lift-off

Answer: B

Anneal is a process involved in the ion implantation phase along with other processes like si+ implant mask, channel implant, source-drain mask, etc.

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