300+ VLSI MCQ Quiz – Objective Question with Answer for VLSI

171. Partitioning should be made on a

A. logical basis
B. functional basis
C. time basis
D. structural basis

Answer: a

Partitioning should be made on a logical basis into recognizable and sensible subfunctions and can be done physically by incorporating clock line isolation and power supply lines.

 

172. Isolation and control are achieved using

A. adders
B. buffers
C. multiplexers
D. multipliers

Answer: c

Isolation and control are better and readily achieved through the use of multiplexers.

 

173. _______ is used to start the initial sequence correctly.

A. preset
B. clear
C. preset and clear
D. clock

Answer: c

The sequential logic testing arises at power-up time. To solve this problem and to start the initial sequence correctly, preset and clear are used.

 

174. Preset and clear are used to

A. initialize only the first sequence
B. correct the first two sequences
C. correct first and last sequence
D. correct alternative sequences

Answer: a

Preset and clear are used to initialize only the first sequence as these are very space-consuming.

 

175. How can over-riding the normal initialization state be achieved?

A. by adding preset
B. by adding a reset
C. by adding gating in initialize control line
D. by adding sourcing in initialize control line

Answer: c

The tester should be able to over-ride the normal initialization state of the logic and this can be achieved by the addition of gating in initializing control line.

 

176. Asynchronous logic is driven by

A. clock
B. gating circuit
C. self-clock
D. self-timing

Answer: d

Asynchronous logic is driven by self-timing state transition in response to changes in the primary input.

 

177. Which is better in terms of memory storage?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: a

Synchronous circuits are better when compared to memory storage. Asynchronous circuits have timing problems and also memory effects and problems.

 

178. Which circuits are faster?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: b

Asynchronous circuits are inherently faster than clocked logic but it has other disadvantages like difficult testing, non-deterministic behavior, being prone to races, etc.

 

179. Which is more sensitive logic?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: b

Asynchronous circuits are more sensitive to tester skews and it is also prone to races and other hazards.

 

180. Which logic is difficult to design?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: b

Asynchronous circuit designs are more difficult than synchronous logic and must be approached with care, taking the account of critical race and other hazard-generating conditions.

 

181. Automatic test pattern generators depend on

A. map design
B. layout design
C. logic domain
D. testing domain

Answer: c

Automatic test pattern generators work in the logic domain and view delay-dependent logic as redundant combinational logic.

 

182. When a clock signal is gated with another signal like a load signal, the output is not affected.

A. true
B. false

Answer: b

When a clock signal is gated with another signal such as a load signal, then any skew on that signal can cause the erroneous output from the associated logic.

 

183. Counters are

A. sequential circuits
B. synchronous circuits
C. asynchronous circuits
D. buffer circuits

Answer: a

Counters are sequential circuits and need a large number of input vectors to be fully tested.

 

184. Wrong readings are recorded due to reset input being

A. dependent on clock signal
B. independent of clock signal
C. dependent on gate signal
D. independent of gate signal

Answer: b

Since reset input is independent of the system clock signal, erroneous readings are being read by the tester.

 

185. To avoid self-resetting, the tester can be overridden by adding

A. an AND gate
B. an OR gate
C. an EX-OR gate
D. shift registers

Answer: b

Self-resetting can be avoided by adding an OR gate that overrides the tester.

 

186. The partitioning technique is not suitable for microprocessor-like circuits.

A. true
B. false

Answer: b

The partitioning technique is very widely used for microprocessor-like circuits and using bus structures is related to the partitioning technique.

 

187. The fast rise and fall times give cross-talk problems if

A. they are in close proximity
B. if they are far away
C. it always gives rise to cross-talk problems
D. does not allow cross-talk problems

Answer: a

The fast rise and fall times of digital signals can give rise to cross-talk problems in analog signal lines if they are in close proximity.

 

188. To route digital signals near analog signals _______ must be done.

A. balancing
B. shielding digital signals
C. balancing and shielding
D. crossing

Answer: c

To route digital signals near analog signals, balancing and shielding of digital signals must be done.

 

189. To access directly another system ______ is done.

A. skipping
B. alternating
C. by-passing
D. by-setting

Answer: c

To directly access another sub-system to be tested from one subsystem, bypassing must be performed.

 

190. With partitioning, bypassing is performed using

A. buffers
B. multiplexers
C. multipliers
D. dividers

Answer: b

With partitioning, to directly access a sub-system for testing, bypassing must be done and this is achieved using multiplexers.

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