61. When both nMOS and pMOS transistors of CMOS logic gates are ON, the output is:
A. 1 or Vdd or HIGH state
B. 0 or ground or LOW state
C. Crowbarred or Contention(X)
D. None of the mentioned
Answer: C
The crowbarred (or contention) X level exists when both pull-up and pull-down transistors are simultaneously turned ON. Contention between the two networks results in an indeterminate output level and dissipates static power.
62. Free running multivibrator is also called as
A. Stable multivibrator
B. Voltage control oscillator
C. Square wave oscillator
D. Pulse stretcher
Answer: B
Free-running multivibrator operates at a frequency that is determined by an external tuning capacitor and a resistor. On applying a dc control voltage the frequency can be shifted on either side. This frequency deviation is directly proportional to the dc control voltage and hence it is called as ‘voltage controlled oscillator’.
63. The output voltage of the phase detector is
A. Phase voltage
B. Free running voltage
C. Error voltage
D. None of the mentioned
Answer: c
The phase detector compares the input frequency with the feedback frequency and produces an output dc voltage called an error voltage.
64. At which state the phase-locked loop tracks any change in input frequency?
A. Free running state
B. Capture state
C. Phase-locked state
D. All of the mentioned
Answer: c
In the phase-locked, the output frequency is exactly the same as the input signal frequency. So the circuit tracks any change in the input frequency through its repetitive action.
65. Match List I with List II which represents the three stages of a phase-locked loop (PLL).
List I
List II
1. Before input frequency applied
i. PLL-Phase locked state
2. When the input frequency applied
ii.PLL=Free running state
3. After input frequency applied
iii. PLL-Capture mode
1-ii, 2-iii, 3
1-iii, 2-ii, 3-i
1-i, 2-ii, 3-iii
1-ii, 2-i, 3-iii
Answer: a
Before the input is applied, the PLL is in a free-running state. Once the input frequency is applied, the VCO frequency starts to change & PLL is said to be in capture mode. When the VCO frequency continues to change until it is equal to the input frequency, the PLL is said to be in the phase-locked state.
66. What is the function of a low pass filter in a phase-locked loop?
A. Improves low-frequency noise
B. Removes high-frequency noise
C. Tracks the voltage changes
D. Changes the input frequency
Answer: B
The output voltage of a phase detector is a dc voltage and is often referred to as error voltage. This output is applied to the low pass filter which removes the high-frequency noise and produces a dc level.
67. What is the need to generate corrective control voltage?
A. To maintain the lock
B. To track the frequency change
C. To shift the VCO frequency
D. All of the mentioned
Answer: D
The output frequency(fo) of VCO is identical to input frequency(fs) except for a finite phase difference(φ), which generates a corrective control voltage to shift VCO frequency from fo to fs, thereby maintaining the lock once locked and PLL tracks the frequency changes of the input signal.
68. At what range the PLL can maintain the lock in the circuit?
A. Lock in range
B. Input range
C. Feedback loop range
D. None of the mentioned
Answer: A
The change in frequency of the incoming signal can be tracked when the PLL is locked. So, the range of frequencies over which PLL maintains the lock with the incoming signal is called the lock-in range.
69. The pull-in time depends on
A. Initial phase and frequency difference between two sign
B. Overall loop gain
C. Loop filter characteristics
D. All of the mentioned
Answer: D
The pull-in time depends on the above-mentioned characteristics to establish a lock in the PLL circuit.
70. The PLL device is:
a) Feedback system that compares output frequency and input frequency
b) Feedback system that compares output phase and input phase
c) Linear system that compares output resistance and input resistance
d) Non-Linear system that compares output current and input current
Answer: b
The PLL device is a feedback system that compares the output phase and the input phase.
