1. Circuit nodes cannot be probed for monitoring or excitation.
2. The circuit should be tested at
A. design level
B. chip level
C. transistor level
D. switch level
3. ______ of the area is dedicated for testability.
4. Partitioning into subsystems is done at
A. design stage
B. prototype stage
C. testing stage
D. fabrication stage
5. In prototype testing, the circuits are
A. open circuited
C. tested as a whole circuit
6. The number of test vectors for exhaustive testing is calculated by
7. After partitioning, the number of vectors is given by
C. 2n+ 2m
8. What are the dominant faults in diffusion layers?
A. short circuit faults
B. open circuit faults
C. short and open circuit faults
D. power supply faults
9. Test pattern generation is assisted using
A. automatic test pattern generator
B. exhaustive pattern generator
C. repeated pattern generator
D. loop pattern generator
10. _____ of faults are easier to detect.