VLSI testing and testability MCQ Quiz – Objective Question with Answer for VLSI testing and testability

11. Hot carrier injection causes

A. threshold voltage shift
B. transconductance degradation
C. threshold voltage shift & transconductance degradation
D. none of the mentioned

Answer: C

Hot carrier injection causes both threshold voltage shift and transconductance degradation due to charge accumulation in the gate oxide.


12. Oxide breakdown occurs due to

A. electrostatic charge
B. threshold voltage
C. voltage shift
D. poor input/output pad circuitry

Answer: D

Oxide breakdown occurs due to inadequate protection against electrostatic discharge and also due to defects or poor design in input/output pad circuitry.


13. Which model is used for pc board testing?

A. stuck at
B. stuck in
C. stuck on
D. stuck through

Answer: A

The stuck-at model is used in the testing of pc boards and is not sufficient to test actual VLSI CMOS circuits.


14. The input signal combination in exhaustive testing is given as

A. 2N
B. 21/N
C. 2(M+N)
D. 1/2N

Answer: A

For testing an N input circuit using exhaustive testing, the total number of input combinations can be given as 2N.


15. Observability is the process of

A. checking all inputs
B. checking all outputs
C. checking all possible inputs
D. checking errors and performance

Answer: B

Observability is the process of observing outputs for all the input combinations.


16. Exhaustive testing is suitable when N is

A. small
B. large
C. any value for N
D. very large

Answer: A

Exhaustive testing is the process where all possible input combinations are used. This is suitable when N is relatively small.


17. Test vectors in sensitized path-based testing is generated

A. before enumerating faults
B. after enumerating faults
C. after designing
D. before designing

Answer: B

In sensitized path-based testing, test vectors are generated after enumerating the possible faults because many patterns may not occur during the application of the circuit.


18. To propagate the fault along the selected path to primary output, setting _____ is done.

A. AND to 1
B. OR to 1
C. NOR to 1
D. NAND to 0

Answer: A

Inputs of another gate are determined so as to propagate the fault signal along the selected path to the primary output of the circuit. This is done by setting AND/NAND to 1 and OR/NOR to 0.


19. In consistency/ justification, tracking is done
A. forward from gate input to primary input
B. backward from the gate input to the primary output
C. backward from the gate input to primary input
D. forward from gate output to the primary output

Answer: C

The consistency step finds the input patterns to realize all the necessary values. This is done by tracking backward from gate input to the primary input of the logic.


20. In D-algorithm, a particular ______ fault is detected by examining the _____ conditions.

A. internal, output
B. internal, input
C. external, output
D. external, input

Answer: A

In a circuit comprising combinational logic, D-algorithm aims at detecting a particular internal fault by examining the output conditions.

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