12. Using the given specifications, determine the voltage to the frequency conversion factor.
A. 8.32
B. 8.90
C. 8.51
D. 8.75
Answer: C
△fo = 2×△Vc/(RT×CT×Vcc)
=>△Vc= (△fo×RT×CT×Vcc)/2
= (4.7µFx10kΩx5x112)/2 = 13.16V.
Kv= △fo/ △Vc
= 112Hz/13.16V
=>Kv=8.51.
13. How to obtain a desired amount of multiplication in frequency multiplier?
A. By decreasing the multiplication factor
B. By increasing the input frequency
C. By selecting proper divide by N-network
D. None of the mentioned
Answer: C
The desired amount of multiplication can be obtained by properly selecting a divide by N-network. For example, to obtain the output frequency fout=5×fin, a divide by N = 5 network is needed.
14. Calculate the output frequency in a frequency multiplier if, fin = 200Hz is applied to a 7 divided by N-network.
A. 1.2kHz
B. 1.6kHz
C. 1.2kHz
D. 1.9kHz
Answer: C
Since the VCO is actually running at a multiple of the input
frequency.
fout=divide by N-network × fin
=7 × 200Hz=1400Hz
=>fout=1.4kHz.
15. For what kind of input signal, the frequency divider can be avoided frequency multiplier?
A. Triangular waveform
B. Square waveform
C. Sawtooth waveform
D. Sine waveform
Answer: A
VCO can be directly locked to the nth harmonic of the input signal without connecting any frequency divider in between the input signal rich in harmonics like a square wave.
16. What must be the typical value of n for a frequency multiplication/division? (n->order of harmonics)
A. n ≤ 12
B. n > 11
C. n < 10
D. n = 7
Answer: D
As the amplitude of the higher-order harmonics becomes less, effective locking may not take place for high values of n. So, the typical value of n is less than 10 for frequency multiplication/division.
17. Determine the offset frequency of frequency translation, when the output and input frequency is given as 75kHz and 1000Hz.
A. 35 kHz
B. 20 kHz
C. 29 kHz
D. 14 kHz
Answer: B
The output of the frequency translation
fo= fs+f1
=> f1 = fo– fs
= 75kHz − 55kHz =20kHz.
18. The frequency corresponding to logic 1 state in FSK is called
A. Space frequency
B. Mark frequency
C. Both mark and space-frequency
D. None of the mentioned
Answer: B
The frequency shift is usually accomplished by dividing a VCO with the binary data signal. Therefore, the logic 1 state of the binary data signal corresponds to mark frequencies.
19. Find the frequency shift in the FSK generator?
A. 230 Hz
B. 250 Hz
C. 180 Hz
D. 200 Hz
Answer: D
The frequency shift is the difference between FSK signals of 1070 Hz and 1270 Hz frequency, which is 200 Hz.
20. Which filter is chosen to remove the carrier component in the frequency shift keying?
A. Three-stage filter
B. Two-stage filter
C. Single-stage filter
D. All of the mentioned
Answer: A
The high cut-off frequency of the ladder filter is chosen to be approximately halfway between the maximum keying rate of 150Hz & twice the input frequency (≅ 2200Hz) which can be obtained using three-stage filters.
21. Which is not considered a linear voltage regulator?
A. Fixed output voltage regulator
B. Adjustable output voltage regulator
C. Switching regulator
D. Special regulator
Answer: C
In the linear regulator, the impedance of the active element may be continuously varied to supply a desired current to the load. But in the switching regulator, a switch is turned on and off.
22. What is the dropout voltage in a three-terminal IC regulator?
A. |Vin| ≥ |Vo|+2v
B. |Vin| o|-2v
C. |V in| = |Vo|
D. |Vin| ≤ |Vo|
Answer: A
The unregulated input voltage must be at least 2V more than the regulated output voltage. For example, if Vo=5V, then Vin=7V.
23. To get a maximum output current, IC regulations are provided with
A. Radiation source
B. Heat sink
C. Peak detector
D. None of the mentioned
Answer: B
The load current may vary from 0 to the rated maximum output current. To maintain this condition, the IC regulator is usually provided with a heat sink; otherwise, it may not provide the rated maximum output current.
24. For the given circuit, let VEB(ON)=1v, ß= 15 and IO=2mA. Calculate the load current
A. IL = 23.45A
B. IL = 46.32A
C. IL = 56.87A
D. IL = 30.75A