Segmentation and Paging MCQ Quiz – Objective Question with Answer for Segmentation and Paging

1. The modified bit is also known as

A. dead bit
B. neat bit
C. dirty bit
D. invalid bit


The dirty bit is said to be set if the processor modifies its memory. This bit indicates that the associative set of blocks regarding the memory is modified and has not yet been saved to the storage.



2. Which of the following have an 8 KB page?

A. DEC Alpha
D. PowerPC

Answer: A

DEC Alpha divides its memory into 8KB pages whereas VAX is a small page that is only 512 bytes in size. PowerPC pages are normally 4 KB and ARM is having 4 KB and 64 KB pages.


3. Which of the following address is seen by the memory unit?

A. logical address
B. physical address
C. virtual address
D. memory address

Answer: B

The logical address is the address generated by the CPU. It is also known as a virtual address. The physical address is the address that is seen by the memory unit.


4. Which of the following modes offers segmentation in the memory?

A. virtual mode
B. real mode
C. protected mode
D. memory mode

Answer: C

The main memory can be split into small blocks by the method of paging and segmentation and these mechanisms are possible only in protected mode.


5. Which of the following is necessary for the address translation in the protected mode?

A. descriptor
B. paging
C. segmentation
D. memory

Answer: A

The address translation from the logical address to the physical address partitions the main memory into different blocks which is called segmentation. Each of these blocks has a descriptor that possesses a descriptor table. So the size of every block is very important for the descriptor.


6. What does “G” in the descriptor entry describe?

A. gain
B. granularity
C. gate voltage
D. global descriptor

Answer: B

The granularity bit controls the resolution of the segmented memory. When it is set to logic one, the resolution is 4 KB. When the granularity bit is set to logic zero, the resolution is 1 byte.


7. How many types of tables are used by the processor in the protected mode?

A. 1
B. 2
C. 3
D. 4

Answer: B

There are two types of descriptor tables used by the processor in the protected mode which is GDT and LDT, that is global descriptor table and the local descriptor table respectively.


8. What does the table indicator indicate when it is set to one?

C. remains unchanged
D. toggles with GTD and LTD

Answer: B

The table indicator is a part of the selector that selects which table is to be used. If the table indicator is set to logic one, the will use the local descriptor table and if the table indicator is set to logic zero, it will use the global descriptor table.


9. What does GDTR stand for?
A. global descriptor table register
B. granularity descriptor table register
C. gate register
D. global direct table register

Answer: A

The global descriptor table register is a special register that has the linear address and the size of its own GDT. Both the global descriptor table register and local descriptor table register are located in the global descriptor table.


10. What does PMMU stands for?

A. protection mode memory management unit
B. paged memory management unit
C. physical memory management unit
D. paged multiple management units

Answer: B

The paged memory management unit is used to decrease the amount of storage needed in the page tables, that is, a multi-level tree structure is used. MC68030, PowerPC, ARM 920 uses a paged memory management unit.

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