VLSI Basic Circuit Concept MCQ Quiz – Objective Question with Answer for VLSI Basic Circuit Concept

61. Interlayer capacitance occurs due to ___________

A. separation between plates
B. electric field between plates
C. charges between plates
D. parallel plate effect

Answer: D

Interlayer capacitance occurs due to a parallel plate effect between one layer and another. When one capacitance value comes closer to another they create some combined effects.

 

62. Which capacitance must be higher?

A. metal to polysilicon capacitance
B. metal to substrate capacitance
C. metal to metal capacitance
D. diffusion capacitance

Answer: A

Metal to polysilicon capacitance should be higher than metal to substrate capacitance. This is that when one layer underlies the other and in consequence, interlayer capacitance is highly dependent on layout.

 

63. Peripheral capacitance is given in _________ per unit length.

A. nano farad
B. picofarad
C. microfarad
D. farad

Answer: B

Peripheral capacitance is given in picofarads per unit length. This is the sidewall capacitance. Each diode has this sidewall capacitance.

 

64. For greater relative value of peripheral capacitance ___________ should be small.

A. source area
B. drain area
C. source & drain area
D. none of the mentioned

Answer: C

The smaller the source or drain area, the greater the relative value of peripheral capacitance as they are both inversely related.

 

65. Diffusion capacitance is equal to ___________

A. area capacitance
B. peripheral capacitance
C. fringing field capacitance
D. area capacitance + peripheral capacitance

Answer: D

Diffusion capacitance is given by the sum of area capacitance and peripheral capacitance.

 

66. Polysilicon is suitable for ___________

A. small distance
B. large distance
C. all of the mentioned’
D. none of the mentioned

Answer: A

Polysilicon is unsuitable for routing Vdd or Vss other than for a very small distance because of the relatively high Rs value of the polysilicon layer.

 

67. Which has a high voltage drop?

A. metal layer
B. polysilicon layer
C. diffusion layer
D. silicide layer

Answer: B

The polysilicon layer has a high voltage drop. It has a moderate RC product.

 

68. Which layer has a high capacitance value?

A. metal
B. diffusion
C. silicide
D. polysilicon

Answer: B

Diffusion or active layer has a high capacitance value due to which it has low or moderate IR drop.

 

69. Which layer has high resistance value?

A. polysilicon
B. silicide
C. diffusion
D. metal

Answer: A

The polysilicon layer has a high resistance value and due to this, it has a high IR drop.

 

70. While measuring the output load capacitance Cgs, n and Cgs, p is not considered. Why?

A. Because Cgs, n and Cgs, p are the capacitances at the input nodes
B. Because Cgs, n and Cgs, p does not exist during the operation of CMOS inverter
C. Because Cgs, n and Cgs, p are storing opposite charges and cancel out each other during the calculation of load capacitance
D. None of the mentioned

Answer: A

Cgs, n and Cgs, p are the gate to source capacitances of nMOS and pMOS transistors in CMOS inverter. They are measured at input node. Therefore they are not considered for the calculation of load capacitance.

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