1. The PLL device is:
a) Feedback system that compares output frequency and input frequency
b) Feedback system that compares output phase and input phase
c) Linear system that compares output resistance and input resistance
d) Non-Linear system that compares output current and input current
2. The Logic gate that works similar to a phase detector is:
a) AND gate
b) OR gate
c) XOR gate
d) NOT gate
3. What is the input at the phase detector?
a) V1(t) – V2(t)
b) Phase(V1) + Phase(V2)
c) Phase(V1) – Phase(V2)
d) V1(t) + V2(t)
4. The aligning of output phase of a voltage controlled oscillator with reference is called:
a) Phase compensation
b) Phase alignment
c) Phase Locking
d) Phase detecting
5. What is the function of LPF in the following block diagram?
a) Suppress high-frequency components of VCO output and present low-frequency AC signal to PD
b) Suppress high-frequency components of PD output and present low-frequency AC signal to VCO
c) Suppress high-frequency components of PD output and present DC signal to VCO
d) None of the mentioned
6. Instead of Phase detection, if a Frequency detector is used the drawback PLL would face is:
a) Finite difference between input and output frequency
b) Equality cannot be established if PLL compared input and output frequency rather than pulses
c) Error between Vin and Vout cannot be removed
d) All of the mentioned
7. If the input of type 1 PLL is a frequency step of Δw at t = 0, the change in phase at t = infinity is:
a) Δw
b) Δw/Kpd
c) Δw/Kpd.Kvco
d) None of the mentioned
8. If a high pass filter is used instead of a low pass filter in the PLL the response of the PLL would be:
a) Output Voltage is not a square wave
b) Output Voltage contains many high-frequency waves
c) VCO will be unstable due to variations in control voltage
d) All of the mentioned
9. Number of poles in Type 1 PLL is:
a) 0
b) 1
c) 2
d) None of the mentioned
10. The transfer function of PD is :
a) Constant
b) Varies with frequency
c) Varies with voltage
d) None of the Mentioned