Embedded System Structure MCQ Quiz – Objective Question with Answer for Embedded System Structure

The low power consumption makes SRAM easily convertible to non-volatile memory, by adding a small battery it can retain its data even when the main power is lost.

DRAM is used in PCs and Embedded systems because of its low cost. SRAM, flash memory, and EEPROM are more costly than DRAM.

DRAM is highly denser and cheaper because it only uses a single capacitor for storing one bit.

DRAM uses a small capacitor whose voltage represents a binary zero which is used as a storage element in DRAM in which a single transistor cell is used to store each bit of data.

Four to six transistors are used to store a single bit of data and form a flip-flop logic gate and thus SRAM is faster in accessing data.

DRAM is said to be more volatile because it has a capacitor as its storage element in which the data disappears when the capacitor loses its charge so even when the device is powered the data can be lost.

Trench capacitors can store from 4-256 Mb but planar capacitors can store up to 1 Mb.

Stacked-cell can store greater than 1 Gb. The planar capacitor can store up to 1 Mb and the trench capacitor can store 4-256 Mb.

Both SRAM and DRAM are volatile memories and flash memory and EPROM are non-volatile memories. DRAM has a storage element like a capacitor whose charge loses gradually thereby losing data.

The chip capacity is dependent on the number of transistors that can be fabricated on the silicon, and DRAM offers more storage capacity than SRAM.

Video RAM is a derivative of DRAM. It functions as a DRAM and has additional functions to access data for video hardware for creating the display.

The temperature-compensated refresh is one of the refreshing techniques used for extending the battery life by reducing the refresh rate.

There are four data lines in the memory and these different organizations of memory and these different organizations of memory are apparent when upgrading memory and it also determines how many chips are needed.

The minimum number of chips is determined by the number of data lines and the width of the data path from the processor. For example, the MC6800 family has a 16-bit wide datapath, 16*1 devices, 4*4 or 2*8 devices are needed.

The memory model is defined by a range of memory address which is accessible to the program. For example, in the C program, the memory address is stored in the pointer.

Endianness defines the order of bytes, that is, whether it is big-endian or little-endian. The former represents the higher-order bits and the latter represents the lower-order bits.

IBM’s PowerPC uses big-endian representation whereas 8086, ARM, and Zilog Z80 use little representation.

The RAM is the primary storage that directly communicates with the CPU. ROM is the secondary storage. Disk drives are capable of providing backup storage and the cache memory is a small high-speed memory that increases the speed of the processor.

There are two types of memory organization, linear addressing in which the entire memory is available to the processor at all times as in Motorola 6800 and the other is segmented addressing where the memory space is divided into several segments and the processor is limited to access the program instructions and data which are located in particular segments.

The 8086 processor has a 20-bit address bus, hence it can access a memory of 220-1 M locations.