VLSI Sequential Logic Testing MCQ Quiz – Objective Question with Answer for Sequential Logic Testing in VLSI

21. Partitioning should be made on a

A. logical basis
B. functional basis
C. time basis
D. structural basis

Answer: a

Partitioning should be made on logical basis into recognizable and sensible subfunctions and can be done physically by incorporating clock line isolation and power supply lines.

 

22. Isolation and control are achieved using

A. adders
B. buffers
C. multiplexers
D. multipliers

Answer: c

Isolation and control are better and readily achieved through the use of multiplexers.

 

23. _______ is used to start the initial sequence correctly.

A. preset
B. clear
C. preset and clear
D. clock

Answer: c

The sequential logic testing arises at power-up time. To solve this problem and to start the initial sequence correctly, preset and clear are used.

 

24. Preset and clear are used to

A. initialize only the first sequence
B. correct the first two sequences
C. correct first and last sequence
D. correct alternative sequences

Answer: a

Preset and clear are used to initialize only the first sequence as these are very space-consuming.

 

25. How can over-riding the normal initialization state be achieved?

A. by adding preset
B. by adding a reset
C. by adding gating in initialize control line
D. by adding sourcing in initialize control line

Answer: c

The tester should be able to over-ride the normal initialization state of the logic and this can be achieved by the addition of gating in initializing control line.

 

26. Asynchronous logic is driven by

A. clock
B. gating circuit
C. self-clock
D. self-timing

Answer: d

Asynchronous logic is driven by self-timing state transition in response to changes in the primary input.

 

27. Which is better in terms of memory storage?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: a

Synchronous circuits are better when compared to memory storage. Asynchronous circuits have timing problems and also memory effects and problems.

 

28. Which circuits are faster?
A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: b

Asynchronous circuits are inherently faster than clocked logic but it has other disadvantages like difficult testing, non-deterministic behavior, being prone to races, etc.

 

29. Which is more sensitive logic?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: b

Asynchronous circuits are more sensitive to tester skews and it is also prone to races and other hazards.

 

30. Which logic is difficult to design?

A. synchronous circuits
B. asynchronous circuits
C. sequential circuits
D. clocked circuits

Answer: b

Asynchronous circuit designs are more difficult than synchronous logic and must be approached with care, taking the account of critical race and other hazard-generating conditions.

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