1. Reduction in power dissipation can be brought by A. increasing transistor area B. decreasing transistor area C. increasing transistor feature size D. decreasing transistor feature size 2. When does the longest delay occur in 8:1 inverters? A. during 1 to 0 transition B. during 0 to 1 transition C. during faster speed D. …
300+ VLSI MCQ Quiz – Objective Question with Answer for VLSI Read More »
1. Design for testability is considered in the production of chips because: A. Manufactured chips are faulty and are required to be tested B. The design of chips is required to be tested C. Many chips are required to be tested within a short interval of time which yields timely delivery for the customers D. …
1. Which are processing faults? A. missing contact window B. parasitic transistor C. oxide breakdown D. all of the mentioned 2. Surface impurities occur due to ion migration. A. true B. false 3. Electromigration is a A. processing fault B. material defects C. time-dependent failure D. packaging fault 4. Which relation is …
VLSI Fault Model MCQ Quiz – Objective Question with Answer for Fault Model in VLSI Read More »
1. Automatic test pattern generator detects only the fault and not its cause. A. true B. false 2. The automatic test pattern generator method has ________ phases. A. two B. three C. four D. five 3. Faults that produce the same faulty behavior are known as A. similar faults B. equivalent faults C. …
1. The test pattern generator which uses a shift register along with LFSR is of __________ bits. A. N B. M C. N+M D. N*M 2. The N+M bit test pattern generator has __________ different patterns produced. A. 2(N+M) B. 2N+M C. 2NM D. 2M+N 3. Which property can prevent high fault coverage? …
1. Which exhibits low fault coverage? A. random test pattern B. pseudo-random test pattern C. deterministic test pattern D. algorithmic test pattern 2. Large AND function will produce _______ infrequently. A. logic 0 B. logic 0 and logic 1 C. logic 1 D. neither logic 0 or 1 3. The circuit which incorporates …
1. Counters detect only bridging faults. A. true B. false 2. How many test patterns are required to test the circuit using counters? A. 2n B. 2(n-1) C. 2n – 1 D. 2n + 1 3. The desired N value for counters is A. less than 50 B. less than 10 C. less than 25 …
1. Which method is used to determine structural defects? A. deterministic test pattern B. algorithmic test pattern C. random test pattern D. exhaustive test pattern 2. Which is known as the stored test pattern method? A. deterministic test pattern B. algorithmic test pattern C. random test pattern D. exhaustive test pattern 3. Which …
1. Cellular automata produce A. exhaustive patterns B. exhaustive pseudo-random patterns C. random patterns D. pseudo-random patterns 2. In which method the effect of bit shifting is not observed or visible? A. internal feedback LFSR B. external feedback LFSR C. cellular automata D. counters 3. The patterns produced using ______ is less random. …
1. Linear feedback shift register occupies more area. A. true B. false 2. In external feedback LFSR, shift registers and feedback paths are combined using A. OR gates B. AND gates C. EX-OR gates D. NAND gates 3. Which uses the highest operating frequency? A. internal feedback LFSR B. external feedback LFSR C. …
Linear Feedback Shift Register (LFSR) MCQ Quiz – Objective Question with Answer for LFSR Read More »
